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8d29c2a6a5
When a block is tail-duplicated, the PHI nodes from that block are replaced with appropriate COPY instructions. When those PHI nodes contained use operands with subregisters, the subregisters were dropped from the COPY instructions, resulting in incorrect code. Keep track of the subregister information and use this information when remapping instructions from the duplicated block. Differential Revision: http://reviews.llvm.org/D19337 llvm-svn: 267583
68 lines
2.5 KiB
LLVM
68 lines
2.5 KiB
LLVM
; RUN: llc -march=hexagon < %s | FileCheck %s
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; REQUIRES: asserts
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; When tail-duplicating a block with PHI nodes that use subregisters, the
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; subregisters were dropped by the tail duplicator, resulting in invalid
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; COPY instructions being generated.
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; CHECK: = extractu(r{{[0-9]+}}, #15, #17)
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target triple = "hexagon"
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%struct.0 = type { i64, i16 }
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%struct.1 = type { i64, i64 }
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declare hidden fastcc void @foo(%struct.0* noalias nocapture, i8 signext, i8 zeroext, i32, i64, i64) unnamed_addr #0
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define void @fred(%struct.0* noalias nocapture sret %agg.result, %struct.1* byval nocapture readonly align 8 %a) #1 {
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entry:
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%0 = load i64, i64* undef, align 8
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switch i32 undef, label %if.else [
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i32 32767, label %if.then
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i32 0, label %if.then7
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]
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if.then: ; preds = %entry
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ret void
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if.then7: ; preds = %entry
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br i1 undef, label %if.then.i, label %if.else16.i
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if.then.i: ; preds = %if.then7
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br i1 undef, label %if.then5.i, label %if.else.i
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if.then5.i: ; preds = %if.then.i
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%shl.i21 = shl i64 %0, 0
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br label %if.end.i
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if.else.i: ; preds = %if.then.i
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%shl12.i = shl i64 %0, undef
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br label %if.end.i
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if.end.i: ; preds = %if.else.i, %if.then5.i
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%aSig0.0 = phi i64 [ undef, %if.then5.i ], [ %shl12.i, %if.else.i ]
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%storemerge43.i = phi i64 [ %shl.i21, %if.then5.i ], [ 0, %if.else.i ]
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%sub15.i = sub nsw i32 -63, undef
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br label %if.end13
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if.else16.i: ; preds = %if.then7
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br label %if.end13
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if.else: ; preds = %entry
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%or12 = or i64 undef, 281474976710656
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br label %if.end13
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if.end13: ; preds = %if.else, %if.else16.i, %if.end.i
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%aSig1.1 = phi i64 [ %0, %if.else ], [ %storemerge43.i, %if.end.i ], [ undef, %if.else16.i ]
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%aSig0.2 = phi i64 [ %or12, %if.else ], [ %aSig0.0, %if.end.i ], [ undef, %if.else16.i ]
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%aExp.0 = phi i32 [ undef, %if.else ], [ %sub15.i, %if.end.i ], [ undef, %if.else16.i ]
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%shl2.i = shl i64 %aSig0.2, 15
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%shr.i = lshr i64 %aSig1.1, 49
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%or.i = or i64 %shl2.i, %shr.i
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tail call fastcc void @foo(%struct.0* noalias %agg.result, i8 signext 80, i8 zeroext undef, i32 %aExp.0, i64 %or.i, i64 undef)
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unreachable
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}
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attributes #0 = { norecurse nounwind }
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attributes #1 = { nounwind }
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