Bill Wendling b1bbf0394f Make sure that the register is in the register class before adding it as a machine op. ... llvm-svn: 142021		2011-10-14 23:55:44 +00:00
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Analysis	An instruction's operands aren't necessarily instructions or constants. They	2011-10-14 09:38:46 +00:00
Archive
AsmParser	Remove last references to hotpatch.	2011-10-04 03:08:43 +00:00
Bitcode	Also update the EH with bitcode. I missed this earlier. Thanks to Duncan for pointing it out.	2011-10-05 07:04:14 +00:00
CodeGen	A few 80-col violations.	2011-10-14 20:36:23 +00:00
DebugInfo	lib/DebugInfo/DWARFDebugLine.cpp: De-Unicode-ify.	2011-10-08 11:22:47 +00:00
ExecutionEngine	MCJIT initialization TargetData	2011-09-30 16:40:10 +00:00
Linker	Allow the source module to be materialized during the linking process.	2011-10-14 22:17:46 +00:00
MC	Disable code/data region symbols on ELF targets, where different mapping symbols are used for ARM/Thumb mode code. This should only be re-enabled once we have a solution to properly distinguish these.	2011-10-14 20:28:57 +00:00
Object	ELF: Fix the section that relocations apply to. Add test to verify. Patch by Danil Malyshev!	2011-10-13 22:30:10 +00:00
Support	Support/Windows: Add support modifying memory permissions on Windows. Patch by Aaron Ballman!	2011-10-13 23:16:01 +00:00
TableGen	Revert r141079: tblgen: add preprocessor as a separate mode	2011-10-08 12:39:26 +00:00
Target	Make sure that the register is in the register class before adding it as a machine op.	2011-10-14 23:55:44 +00:00
Transforms	Avoid undefined behavior in negation in LSR. Patch by Ahmed Charles.	2011-10-13 23:48:33 +00:00
VMCore	constify array itself, don't iterate multiple times.	2011-10-14 22:50:21 +00:00
CMakeLists.txt	Move TableGen's parser and entry point into a library	2011-10-01 16:41:13 +00:00
Makefile	Remove more of llvmc and dependencies.	2011-09-20 00:34:27 +00:00