1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-22 04:22:57 +02:00
llvm-mirror/test/MC
Valery Pykhtin 1971061641 [AMDGPU] fix readlane/readfirstlane src vgpr operand type.
For VGPR_32 operand disassembler expects a VGPR register encoded as 0..255 (enum8 src operand).
readfirstlane/readline actually has enum9 operand and this change fixes VGPR_32 to VS_32 (enum9 encoding).

Differential Revision: http://reviews.llvm.org/D18696

llvm-svn: 265670
2016-04-07 13:41:51 +00:00
..
AArch64 AArch64: support .cpu directive 2016-04-02 19:29:52 +00:00
AMDGPU [AMDGPU] AsmParser: disable DPP for unsupported instructions. New dpp tests. Fix v_nop_dpp. 2016-04-06 13:29:59 +00:00
ARM Fix for pr24346: arm asm label calculation error in sub 2016-04-01 09:40:47 +00:00
AsmParser [MCParser] Accept uppercase radix variants 0X and 0B 2016-03-18 18:22:07 +00:00
COFF [codeview] Dump def range lengths in hex 2016-02-11 23:40:14 +00:00
Disassembler [AMDGPU] fix readlane/readfirstlane src vgpr operand type. 2016-04-07 13:41:51 +00:00
ELF testcase gardening: update the emissionKind enum to the new syntax. (NFC) 2016-04-01 00:16:49 +00:00
Hexagon [Hexagon] Add handling fixups and instruction relaxation 2016-03-21 20:27:17 +00:00
Lanai [lanai] isBrImm should accept any non-constant immediate. 2016-03-31 17:58:55 +00:00
MachO Add missing emissionKind flags to the DICompileUnits of several old testcases. 2016-04-01 22:18:43 +00:00
Markup
Mips [mips] MIPSR6 Compact jump support 2016-04-05 12:50:29 +00:00
PowerPC [Power9] Implement add-pc, multiply-add, modulo, extend-sign-shift, random number, set bool, and dfp test significance 2016-04-06 01:47:02 +00:00
Sparc Sparc: silently ignore .proc assembler directive 2016-03-28 14:00:11 +00:00
SystemZ [SystemZ] Add compare-and-branch instructions to MC 2016-04-04 14:26:43 +00:00
X86 testcase gardening: update the emissionKind enum to the new syntax. (NFC) 2016-04-01 00:16:49 +00:00