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40 lines
1.6 KiB
LLVM
40 lines
1.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -mem2reg -simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S | FileCheck %s
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define i32 @test_inline_constraint_S_label_tailmerged(i1 %in) {
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; CHECK-LABEL: @test_inline_constraint_S_label_tailmerged(
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; CHECK-NEXT: call void asm sideeffect "adr x0, $0", "S"(i8* blockaddress(@test_inline_constraint_S_label_tailmerged, [[COMMON_RET:%.*]]))
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; CHECK-NEXT: [[COMMON_RETVAL:%.*]] = select i1 [[IN:%.*]], i32 0, i32 42
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; CHECK-NEXT: br label [[COMMON_RET]]
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; CHECK: common.ret:
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; CHECK-NEXT: ret i32 [[COMMON_RETVAL]]
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;
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call void asm sideeffect "adr x0, $0", "S"(i8* blockaddress(@test_inline_constraint_S_label_tailmerged, %loc))
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br i1 %in, label %loc, label %loc2
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loc:
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br label %common.ret
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loc2:
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br label %common.ret
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common.ret:
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%common.retval = phi i32 [ 0, %loc ], [ 42, %loc2 ]
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ret i32 %common.retval
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}
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define i32 @test_inline_constraint_S_label_tailmerged2(i1 %in) {
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; CHECK-LABEL: @test_inline_constraint_S_label_tailmerged2(
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; CHECK-NEXT: common.ret:
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; CHECK-NEXT: call void asm sideeffect "adr x0, $0", "S"(i8* blockaddress(@test_inline_constraint_S_label_tailmerged, [[COMMON_RET:%.*]]))
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; CHECK-NEXT: [[DOT:%.*]] = select i1 [[IN:%.*]], i32 0, i32 42
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; CHECK-NEXT: ret i32 [[DOT]]
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;
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call void asm sideeffect "adr x0, $0", "S"(i8* blockaddress(@test_inline_constraint_S_label_tailmerged, %loc))
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br i1 %in, label %loc, label %loc2
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common.ret:
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%common.retval = phi i32 [ 0, %loc ], [ 42, %loc2 ]
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ret i32 %common.retval
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loc:
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br label %common.ret
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loc2:
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br label %common.ret
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}
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