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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 19:23:23 +01:00
llvm-mirror/test/CodeGen/AMDGPU
2016-10-17 22:40:15 +00:00
..
GlobalISel GlobalISel: move type information to MachineRegisterInfo. 2016-09-09 11:46:34 +00:00
32-bit-local-address-space.ll AMDGPU: Use unsigned compare for eq/ne 2016-09-30 01:50:20 +00:00
add_i64.ll
add_i128.ll AMDGPU: Select 64-bit {ADD,SUB}{C,E} nodes 2016-10-14 10:30:00 +00:00
add-debug.ll
add.ll
addrspacecast-constantexpr.ll
addrspacecast.ll AMDGPU: Use unsigned compare for eq/ne 2016-09-30 01:50:20 +00:00
amdgcn.bitcast.ll AMDGPU/R600: EXTRACT_VECT_ELT should only bypass BUILD_VECTOR if the vectors have the same number of elements. 2016-09-02 20:13:19 +00:00
amdgcn.private-memory.ll
amdgpu-codegenprepare-fdiv.ll [AMDGPU] Promote uniform i16 ops to i32 ops for targets that have 16 bit instructions 2016-09-28 20:05:39 +00:00
amdgpu-codegenprepare-i16-to-i32.ll [AMDGPU] Promote uniform (i1, i16] operations to i32 2016-10-07 14:22:58 +00:00
amdgpu-shader-calling-convention.ll
amdgpu.private-memory.ll [DAG] Teach computeKnownBits and ComputeNumSignBits in SelectionDAG to look through EXTRACT_VECTOR_ELT. 2016-10-05 17:40:27 +00:00
amdgpu.work-item-intrinsics.deprecated.ll AMDGPU: Remove read_workdim intrinsic 2016-07-25 20:17:02 +00:00
and-gcn.ll
and.ll AMDGPU: Improve splitting 64-bit bit ops by constants 2016-09-14 15:19:03 +00:00
annotate-kernel-features-hsa.ll
annotate-kernel-features.ll
anonymous-gv.ll AMDGPU/SI: Don't crash on anonymous GlobalValues 2016-09-26 17:29:25 +00:00
anyext.ll
array-ptr-calc-i32.ll [AMDGPU] Wave and register controls 2016-09-06 20:22:28 +00:00
array-ptr-calc-i64.ll
atomic_cmp_swap_local.ll
atomic_load_add.ll
atomic_load_sub.ll
attr-amdgpu-flat-work-group-size.ll [AMDGPU] Wave and register controls 2016-09-06 20:22:28 +00:00
attr-amdgpu-num-sgpr.ll [AMDGPU] Wave and register controls 2016-09-06 20:22:28 +00:00
attr-amdgpu-num-vgpr.ll [AMDGPU] Wave and register controls 2016-09-06 20:22:28 +00:00
attr-amdgpu-waves-per-eu.ll [AMDGPU] Wave and register controls 2016-09-06 20:29:10 +00:00
attr-unparseable.ll [AMDGPU] Wave and register controls 2016-09-06 20:22:28 +00:00
basic-branch.ll AMDGPU: Use unsigned compare for eq/ne 2016-09-30 01:50:20 +00:00
basic-loop.ll
bfe_uint.ll
bfi_int.ll
bfm.ll
big_alu.ll AMDGPU: Fix TargetPrefix for remaining r600 intrinsics 2016-07-15 21:27:08 +00:00
bitcast-vector-extract.ll AMDGPU: Push bitcasts through build_vector 2016-09-17 15:44:16 +00:00
bitreverse-inline-immediates.ll
bitreverse.ll AMDGPU: Improve splitting 64-bit bit ops by constants 2016-09-14 15:19:03 +00:00
branch-condition-and.ll AMDGPU: Fix use-after-free in SIOptimizeExecMasking 2016-10-07 08:40:14 +00:00
branch-relax-spill.ll BranchRelaxation: Support expanding unconditional branches 2016-10-06 16:20:41 +00:00
branch-relaxation.ll BranchRelaxation: Support expanding unconditional branches 2016-10-06 16:20:41 +00:00
branch-uniformity.ll AMDGPU: Use unsigned compare for eq/ne 2016-09-30 01:50:20 +00:00
bswap.ll AMDGPU: Improve splitting 64-bit bit ops by constants 2016-09-14 15:19:03 +00:00
bug-vopc-commute.ll
build_vector.ll
call_fs.ll
call.ll
calling-conventions.ll
captured-frame-index.ll [AMDGPU] Emit 32-bit lo/hi got and pc relative variant kinds for external and global address space variables 2016-10-14 04:37:34 +00:00
cayman-loop-bug.ll
cf_end.ll
cf-loop-on-constant.ll AMDGPU: Use unsigned compare for eq/ne 2016-09-30 01:50:20 +00:00
cf-stack-bug.ll
cgp-addressing-modes-flat.ll
cgp-addressing-modes.ll Revert "AMDGPU: Don't use offen if it is 0" 2016-10-01 02:35:24 +00:00
cgp-bitfield-extract.ll
ci-use-flat-for-global.ll
cndmask-no-def-vcc.ll AMDGPU: Use unsigned compare for eq/ne 2016-09-30 01:50:20 +00:00
coalescer_distribute.ll
coalescer_remat.ll
coalescer-subrange-crash.ll Do not consider subreg defs as reads when computing subrange liveness 2016-09-02 19:48:55 +00:00
coalescer-subreg-join.mir Do not consider subreg defs as reads when computing subrange liveness 2016-09-02 19:48:55 +00:00
codegen-prepare-addrmode-sext.ll
combine_vloads.ll
commute_modifiers.ll AMDGPU: Support commuting with immediate in src0 2016-09-08 17:19:29 +00:00
commute-compares.ll AMDGPU: Use unsigned compare for eq/ne 2016-09-30 01:50:20 +00:00
commute-shifts.ll AMDGPU: Remove superfluous string attributes from tests 2016-07-11 23:35:48 +00:00
complex-folding.ll AMDGPU: Fix TargetPrefix for remaining r600 intrinsics 2016-07-15 21:27:08 +00:00
concat_vectors.ll
constant-fold-mi-operands.ll AMDGPU: Improve splitting 64-bit bit ops by constants 2016-09-14 15:19:03 +00:00
control-flow-fastregalloc.ll AMDGPU: Assume spilling will occur at -O0 2016-10-13 13:10:00 +00:00
convergent-inlineasm.ll AMDGPU: Use unsigned compare for eq/ne 2016-09-30 01:50:20 +00:00
copy-illegal-type.ll
copy-to-reg.ll
ctlz_zero_undef.ll [AMDGPU] Promote uniform (i1, i16] operations to i32 2016-10-07 14:22:58 +00:00
ctlz.ll [AMDGPU] Promote uniform (i1, i16] operations to i32 2016-10-07 14:22:58 +00:00
ctpop64.ll AMDGPU: Improve splitting 64-bit bit ops by constants 2016-09-14 15:19:03 +00:00
ctpop.ll
cttz_zero_undef.ll
cube.ll
cvt_f32_ubyte.ll Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled." 2016-10-13 20:23:25 +00:00
cvt_flr_i32_f32.ll AMDGPU: Support commuting with immediate in src0 2016-09-08 17:19:29 +00:00
cvt_rpi_i32_f32.ll
dagcombine-reassociate-bug.ll
dagcombiner-bug-illegal-vec4-int-to-fp.ll
debug.ll
debugger-emit-prologue.ll
debugger-insert-nops.ll Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled." 2016-10-13 20:23:25 +00:00
debugger-reserve-regs.ll AMDGPU: Remove superfluous string attributes from tests 2016-07-11 23:35:48 +00:00
default-fp-mode.ll
detect-dead-lanes.mir MIRParser/MIRPrinter: Compute isSSA instead of printing/parsing it. 2016-08-24 01:32:41 +00:00
disconnected-predset-break-bug.ll
drop-mem-operand-move-smrd.ll
ds_read2_offset_order.ll AMDGPU: Run LoadStoreVectorizer pass by default 2016-09-09 22:29:28 +00:00
ds_read2_superreg.ll AMDGPU: Remove superfluous string attributes from tests 2016-07-11 23:35:48 +00:00
ds_read2.ll AMDGPU: Remove superfluous string attributes from tests 2016-07-11 23:35:48 +00:00
ds_read2st64.ll AMDGPU/SI: Canonicalize offset order for merged DS instructions 2016-08-26 21:36:47 +00:00
ds_write2.ll AMDGPU/SI: Improve SILoadStoreOptimizer and run it before the scheduler 2016-08-29 19:15:22 +00:00
ds_write2st64.ll AMDGPU: Remove superfluous string attributes from tests 2016-07-11 23:35:48 +00:00
ds-negative-offset-addressing-mode-loop.ll AMDGPU: Remove superfluous string attributes from tests 2016-07-11 23:35:48 +00:00
ds-sub-offset.ll
dynamic_stackalloc.ll
elf.ll AMDGPU/SI: Increase SGPR limit to 96 on Tonga/Iceland 2016-08-05 21:23:29 +00:00
elf.r600.ll
else.ll AMDGPU: Split SILowerControlFlow into two pieces 2016-08-22 19:33:16 +00:00
empty-function.ll
endcf-loop-header.ll
extload-align.ll [DAG] Fix incorrect alignment of ext load. 2016-09-22 17:28:43 +00:00
extload-private.ll Revert "AMDGPU: Don't use offen if it is 0" 2016-10-01 02:35:24 +00:00
extload.ll
extract_vector_elt-f64.ll
extract_vector_elt-i8.ll
extract_vector_elt-i16.ll
extract_vector_elt-i64.ll
extract-vector-elt-build-vector-combine.ll
extractelt-to-trunc.ll
fabs.f64.ll AMDGPU: Support commuting with immediate in src0 2016-09-08 17:19:29 +00:00
fabs.ll AMDGPU: Support commuting with immediate in src0 2016-09-08 17:19:29 +00:00
fadd64.ll
fadd.ll
fcanonicalize.ll
fceil64.ll AMDGPU: Support commuting with immediate in src0 2016-09-08 17:19:29 +00:00
fceil.ll
fcmp64.ll
fcmp-cnd.ll
fcmp-cnde-int-args.ll
fcmp.ll
fconst64.ll
fcopysign.f32.ll
fcopysign.f64.ll
fdiv.f64.ll AMDGPU: Use unsigned compare for eq/ne 2016-09-30 01:50:20 +00:00
fdiv.ll AMDGPU: Change fdiv lowering based on !fpmath metadata 2016-07-19 23:16:53 +00:00
fetch-limits.r600.ll AMDGPU: Fix TargetPrefix for remaining r600 intrinsics 2016-07-15 21:27:08 +00:00
fetch-limits.r700+.ll AMDGPU: Fix TargetPrefix for remaining r600 intrinsics 2016-07-15 21:27:08 +00:00
ffloor.f64.ll AMDGPU: Move cndmask pseudo to be isel pseudo 2016-08-27 01:00:37 +00:00
ffloor.ll
flat_atomics_i64.ll
flat_atomics.ll
flat-address-space.ll AMDGPU/SI: Don't allow unaligned scratch access 2016-10-14 18:10:39 +00:00
flat-scratch-reg.ll AMDGPU : Add XNACK feature to GPUs that support it. 2016-09-06 19:55:17 +00:00
floor.ll AMDGPU: Fix TargetPrefix for remaining r600 intrinsics 2016-07-15 21:27:08 +00:00
fma-combine.ll AMDGPU/SI: Implement a custom MachineSchedStrategy 2016-08-29 19:42:52 +00:00
fma.f64.ll
fma.ll
fmad.ll AMDGPU: Fix TargetPrefix for remaining r600 intrinsics 2016-07-15 21:27:08 +00:00
fmax3.f64.ll AMDGPU/SI: Implement a custom MachineSchedStrategy 2016-08-29 19:42:52 +00:00
fmax3.ll
fmax_legacy.f64.ll
fmax_legacy.ll
fmax.ll AMDGPU: Fix TargetPrefix for remaining r600 intrinsics 2016-07-15 21:27:08 +00:00
fmaxnum.f64.ll
fmaxnum.ll AMDGPU: Support commuting with immediate in src0 2016-09-08 17:19:29 +00:00
fmed3.ll AMDGPU: Remove superfluous string attributes from tests 2016-07-11 23:35:48 +00:00
fmin3.ll
fmin_legacy.f64.ll
fmin_legacy.ll
fmin.ll AMDGPU: Fix TargetPrefix for remaining r600 intrinsics 2016-07-15 21:27:08 +00:00
fminnum.f64.ll
fminnum.ll AMDGPU: Support commuting with immediate in src0 2016-09-08 17:19:29 +00:00
fmul64.ll
fmul-2-combine-multi-use.ll AMDGPU: Support commuting with immediate in src0 2016-09-08 17:19:29 +00:00
fmul.ll AMDGPU: Fix TargetPrefix for remaining r600 intrinsics 2016-07-15 21:27:08 +00:00
fmuladd.ll
fnearbyint.ll
fneg-fabs.f64.ll AMDGPU: Support commuting with immediate in src0 2016-09-08 17:19:29 +00:00
fneg-fabs.ll AMDGPU: Fix immediate folding logic when shrinking instructions 2016-09-09 23:32:53 +00:00
fneg.f64.ll
fneg.ll
fp16_to_fp.ll
fp32_to_fp16.ll
fp_to_sint.f64.ll AMDGPU: Fix i1 fp_to_int 2016-07-22 17:01:21 +00:00
fp_to_sint.ll AMDGPU: Fix i1 fp_to_int 2016-07-22 17:01:21 +00:00
fp_to_uint.f64.ll AMDGPU: Fix i1 fp_to_int 2016-07-22 17:01:21 +00:00
fp_to_uint.ll AMDGPU: Fix i1 fp_to_int 2016-07-22 17:01:21 +00:00
fp-classify.ll
fpext.ll
fptrunc.ll
fract.f64.ll AMDGPU: Move cndmask pseudo to be isel pseudo 2016-08-27 01:00:37 +00:00
fract.ll
frem.ll
fsqrt.f64.ll
fsqrt.ll
fsub64.ll AMDGPU: Support commuting with immediate in src0 2016-09-08 17:19:29 +00:00
fsub.ll AMDGPU: Fix TargetPrefix for remaining r600 intrinsics 2016-07-15 21:27:08 +00:00
ftrunc.f64.ll
ftrunc.ll
gep-address-space.ll
global_atomics_i64.ll
global_atomics.ll
global-constant.ll Revert "[AMDGPU] Emit read-only data to .rodata for hsa" 2016-07-22 23:46:40 +00:00
global-directive.ll
global-variable-relocs.ll [AMDGPU] Emit 32-bit lo/hi got and pc relative variant kinds for external and global address space variables 2016-10-14 04:37:34 +00:00
gv-const-addrspace.ll
gv-offset-folding.ll
half.ll AMDGPU: Fix immediate folding logic when shrinking instructions 2016-09-09 23:32:53 +00:00
hsa-default-device.ll
hsa-fp-mode.ll [AMDGPU] Assembler: rename amd_kernel_code_t asm names according to spec 2016-09-09 10:08:02 +00:00
hsa-func.ll AMDGPU/SI: Add support for R_AMDGPU_GOTPCREL 2016-07-13 14:23:33 +00:00
hsa-globals.ll Revert "[AMDGPU] Emit read-only data to .rodata for hsa" 2016-07-22 23:46:40 +00:00
hsa-group-segment.ll
hsa-note-no-func.ll AMDGPU/SI: Update ISA version numbers for Tonga and Polaris10/11. 2016-10-11 16:00:47 +00:00
hsa.ll [AMDGPU] Mark .note section SHF_ALLOC so lld creates a segment for it 2016-10-17 22:40:15 +00:00
i1-copy-implicit-def.ll
i1-copy-phi.ll AMDGPU: Use unsigned compare for eq/ne 2016-09-30 01:50:20 +00:00
i8-to-double-to-float.ll
icmp64.ll AMDGPU: Use unsigned compare for eq/ne 2016-09-30 01:50:20 +00:00
icmp-select-sete-reverse-args.ll
image-attributes.ll
image-resource-id.ll
imm.ll AMDGPU: Support commuting with immediate in src0 2016-09-08 17:19:29 +00:00
indirect-addressing-si-noopt.ll Replace subregister uses when processing tied operands 2016-08-26 06:31:32 +00:00
indirect-addressing-si.ll AMDGPU: Initial implementation of VGPR indexing mode 2016-10-12 18:49:05 +00:00
indirect-private-64.ll [AMDGPU] Wave and register controls 2016-09-06 20:22:28 +00:00
infinite-loop-evergreen.ll llvm/test/CodeGen/AMDGPU/infinite-loop-evergreen.ll REQUIRES +Asserts. 2016-09-12 04:27:28 +00:00
infinite-loop.ll
inline-asm.ll AMDGPU: Use unsigned compare for eq/ne 2016-09-30 01:50:20 +00:00
inline-calls.ll AMDGPU/SI: Handle aliases in AMDGPUAlwaysInlinePass 2016-08-31 11:18:33 +00:00
inline-constraints.ll AMDGPU: Relax SGPR asm constraint register class 2016-08-30 20:50:08 +00:00
input-mods.ll AMDGPU: Fix TargetPrefix for remaining r600 intrinsics 2016-07-15 21:27:08 +00:00
insert_subreg.ll
insert_vector_elt.ll Revert "AMDGPU: Don't use offen if it is 0" 2016-10-01 02:35:24 +00:00
invalid-addrspacecast.ll
invalid-opencl-version-metadata1.ll AMDGPU: Fix bug causing crash due to invalid opencl version metadata. 2016-07-20 14:38:06 +00:00
invalid-opencl-version-metadata2.ll AMDGPU: Fix bug causing crash due to invalid opencl version metadata. 2016-07-20 14:38:06 +00:00
invalid-opencl-version-metadata3.ll AMDGPU: Fix bug causing crash due to invalid opencl version metadata. 2016-07-20 14:38:06 +00:00
invariant-load-no-alias-store.ll AMDGPU: Run LoadStoreVectorizer pass by default 2016-09-09 22:29:28 +00:00
jump-address.ll AMDGPU: Fix TargetPrefix for remaining r600 intrinsics 2016-07-15 21:27:08 +00:00
kcache-fold.ll AMDGPU: Fix TargetPrefix for remaining r600 intrinsics 2016-07-15 21:27:08 +00:00
kernarg-stack-alignment.ll
kernel-args.ll AMDGPU/SI: Fix kernel argument ABI for HSA 2016-09-16 22:20:24 +00:00
large-alloca-compute.ll [AMDGPU] Assembler: rename amd_kernel_code_t asm names according to spec 2016-09-09 10:08:02 +00:00
large-alloca-graphics.ll
large-constant-initializer.ll
large-work-group-promote-alloca.ll [AMDGPU] Wave and register controls 2016-09-06 20:22:28 +00:00
lds-alignment.ll
lds-initializer.ll
lds-m0-init-in-loop.ll
lds-oqap-crash.ll
lds-output-queue.ll AMDGPU/R600: Replace barrier intrinsics 2016-07-18 18:34:59 +00:00
lds-size.ll
lds-zero-initializer.ll
legalizedag-bug-expand-setcc.ll
lit.local.cfg
literals.ll AMDGPU/R600: Delete/rename intrinsics no longer used by mesa 2016-07-14 05:47:17 +00:00
liveness.mir MIRParser: Use dot instead of colon to mark subregisters 2016-07-26 21:49:34 +00:00
llvm.amdgcn.atomic.dec.ll
llvm.amdgcn.atomic.inc.ll
llvm.amdgcn.buffer.atomic.ll
llvm.amdgcn.buffer.load.format.ll
llvm.amdgcn.buffer.load.ll
llvm.amdgcn.buffer.store.format.ll
llvm.amdgcn.buffer.store.ll
llvm.amdgcn.buffer.wbinvl1.ll
llvm.amdgcn.buffer.wbinvl1.sc.ll
llvm.amdgcn.buffer.wbinvl1.vol.ll
llvm.amdgcn.class.ll
llvm.amdgcn.cos.ll
llvm.amdgcn.cubeid.ll
llvm.amdgcn.cubema.ll
llvm.amdgcn.cubesc.ll
llvm.amdgcn.cubetc.ll
llvm.amdgcn.dispatch.id.ll AMDGPU: Add HSA dispatch id intrinsic 2016-07-22 17:01:30 +00:00
llvm.amdgcn.dispatch.ptr.ll
llvm.amdgcn.div.fixup.ll
llvm.amdgcn.div.fmas.ll AMDGPU: Use unsigned compare for eq/ne 2016-09-30 01:50:20 +00:00
llvm.amdgcn.div.scale.ll
llvm.amdgcn.ds.bpermute.ll
llvm.amdgcn.ds.permute.ll
llvm.amdgcn.ds.swizzle.ll
llvm.amdgcn.fcmp.ll AMDGPU: Support commuting with immediate in src0 2016-09-08 17:19:29 +00:00
llvm.amdgcn.fdiv.fast.ll AMDGPU: Change fdiv lowering based on !fpmath metadata 2016-07-19 23:16:53 +00:00
llvm.amdgcn.fmul.legacy.ll AMDGPU: Support commuting with immediate in src0 2016-09-08 17:19:29 +00:00
llvm.amdgcn.fract.ll
llvm.amdgcn.frexp.exp.ll
llvm.amdgcn.frexp.mant.ll
llvm.amdgcn.groupstaticsize.ll AMDGPU: Fix groupstaticsize for large LDS 2016-07-22 17:01:33 +00:00
llvm.amdgcn.icmp.ll AMDGPU: Use unsigned compare for eq/ne 2016-09-30 01:50:20 +00:00
llvm.amdgcn.image.atomic.ll
llvm.amdgcn.image.gather4.ll AMDGPU/SI: Implement amdgcn image intrinsics with sampler 2016-08-10 21:15:30 +00:00
llvm.amdgcn.image.getlod.ll AMDGPU/SI: Implement amdgcn image intrinsics with sampler 2016-08-10 21:15:30 +00:00
llvm.amdgcn.image.ll AMDGPU/SI: Change mimg intrinsic signatures 2016-10-12 16:35:29 +00:00
llvm.amdgcn.image.sample.ll AMDGPU/SI: Implement amdgcn image intrinsics with sampler 2016-08-10 21:15:30 +00:00
llvm.amdgcn.image.sample.o.ll AMDGPU/SI: Implement amdgcn image intrinsics with sampler 2016-08-10 21:15:30 +00:00
llvm.amdgcn.interp.ll
llvm.amdgcn.kernarg.segment.ptr.ll AMDGPU/SI: Include implicit arguments in kernarg_segment_byte_size 2016-09-23 01:33:26 +00:00
llvm.amdgcn.ldexp.ll AMDGPU: Remove AMDGPU.ldexp 2016-07-15 21:26:56 +00:00
llvm.amdgcn.lerp.ll AMDGPU: Add LLVM IR Intrinsic for v_lerp_u8 2016-07-12 18:02:14 +00:00
llvm.amdgcn.log.clamp.ll
llvm.amdgcn.mbcnt.ll
llvm.amdgcn.mov.dpp.ll
llvm.amdgcn.mqsad.pk.u16.u8.ll AMDGPU : Fix QSAD and MQSAD instructions' incorrect data type. 2016-08-18 19:51:14 +00:00
llvm.amdgcn.mqsad.u32.u8.ll AMDGPU : Fix mqsad_u32_u8 instruction incorrect data type. 2016-09-09 19:31:51 +00:00
llvm.amdgcn.msad.u8.ll AMDGPU : Fix SAD related instruction LIT tests function atttibute issues. 2016-08-11 17:14:17 +00:00
llvm.amdgcn.ps.live.ll
llvm.amdgcn.qsad.pk.u16.u8.ll AMDGPU : Fix QSAD and MQSAD instructions' incorrect data type. 2016-08-18 19:51:14 +00:00
llvm.amdgcn.queue.ptr.ll
llvm.amdgcn.rcp.legacy.ll AMDGPU: Add fp legacy instruction intrinsics 2016-07-26 16:45:45 +00:00
llvm.amdgcn.rcp.ll
llvm.amdgcn.readfirstlane.ll AMDGCN/SI: Implement readlane/readfirstlane intrinsics 2016-08-24 20:35:23 +00:00
llvm.amdgcn.readlane.ll AMDGCN/SI: Implement readlane/readfirstlane intrinsics 2016-08-24 20:35:23 +00:00
llvm.amdgcn.rsq.clamp.ll AMDGPU: Fix immediate folding logic when shrinking instructions 2016-09-09 23:32:53 +00:00
llvm.amdgcn.rsq.legacy.ll
llvm.amdgcn.rsq.ll
llvm.amdgcn.s.barrier.ll
llvm.amdgcn.s.dcache.inv.ll
llvm.amdgcn.s.dcache.inv.vol.ll
llvm.amdgcn.s.dcache.wb.ll
llvm.amdgcn.s.dcache.wb.vol.ll
llvm.amdgcn.s.decperflevel.ll [AMDGPU] add s_incperflevel/s_decperflevel intrinsics. 2016-08-18 18:06:20 +00:00
llvm.amdgcn.s.getreg.ll
llvm.amdgcn.s.incperflevel.ll [AMDGPU] add s_incperflevel/s_decperflevel intrinsics. 2016-08-18 18:06:20 +00:00
llvm.amdgcn.s.memrealtime.ll
llvm.amdgcn.s.memtime.ll
llvm.amdgcn.s.sleep.ll
llvm.amdgcn.s.waitcnt.ll AMDGPU/SI: Change mimg intrinsic signatures 2016-10-12 16:35:29 +00:00
llvm.amdgcn.sad.hi.u8.ll AMDGPU : Fix SAD related instruction LIT tests function atttibute issues. 2016-08-11 17:14:17 +00:00
llvm.amdgcn.sad.u8.ll AMDGPU : Fix SAD related instruction LIT tests function atttibute issues. 2016-08-11 17:14:17 +00:00
llvm.amdgcn.sad.u16.ll AMDGPU : Fix SAD related instruction LIT tests function atttibute issues. 2016-08-11 17:14:17 +00:00
llvm.amdgcn.sffbh.ll AMDGPU: Add intrinsic for s_flbit_i32/v_ffbh_i32 2016-07-18 18:35:05 +00:00
llvm.amdgcn.sin.ll
llvm.amdgcn.trig.preop.ll
llvm.amdgcn.workgroup.id.ll AMDGPU/SI: Add support for triples with the mesa3d operating system 2016-09-16 21:34:26 +00:00
llvm.amdgcn.workitem.id.ll AMDGPU/SI: Add support for triples with the mesa3d operating system 2016-09-16 21:34:26 +00:00
llvm.AMDGPU.bfe.i32.ll
llvm.AMDGPU.bfe.u32.ll
llvm.AMDGPU.clamp.ll AMDGPU: Support commuting with immediate in src0 2016-09-08 17:19:29 +00:00
llvm.AMDGPU.cube.ll AMDGPU: Fix TargetPrefix for remaining r600 intrinsics 2016-07-15 21:27:08 +00:00
llvm.AMDGPU.kill.ll
llvm.amdgpu.kilp.ll
llvm.cos.ll
llvm.dbg.value.ll AMDGPU: Remove superfluous string attributes from tests 2016-07-11 23:35:48 +00:00
llvm.exp2.ll
llvm.log2.ll
llvm.memcpy.ll AMDGPU: Fix shouldConvertConstantLoadToIntImm behavior 2016-07-30 01:40:36 +00:00
llvm.pow.ll AMDGPU: Fix TargetPrefix for remaining r600 intrinsics 2016-07-15 21:27:08 +00:00
llvm.r600.dot4.ll AMDGPU/R600: Delete/rename intrinsics no longer used by mesa 2016-07-14 05:47:17 +00:00
llvm.r600.group.barrier.ll AMDGPU/R600: Replace barrier intrinsics 2016-07-18 18:34:59 +00:00
llvm.r600.read.local.size.ll
llvm.r600.recipsqrt.clamped.ll AMDGPU: Remove legacy rsq.clamped intrinsic 2016-07-15 21:26:52 +00:00
llvm.r600.recipsqrt.ieee.ll AMDGPU: Remove legacy rsq.clamped intrinsic 2016-07-15 21:26:52 +00:00
llvm.r600.tex.ll AMDGPU/R600: Delete/rename intrinsics no longer used by mesa 2016-07-14 05:47:17 +00:00
llvm.rint.f64.ll
llvm.rint.ll
llvm.round.f64.ll AMDGPU: Use unsigned compare for eq/ne 2016-09-30 01:50:20 +00:00
llvm.round.ll AMDGPU: Support commuting with immediate in src0 2016-09-08 17:19:29 +00:00
llvm.SI.fs.interp.ll
llvm.SI.gather4.ll AMDGPU: Unify MOVRELSOffset and MOVRELDOffset 2016-07-12 08:12:16 +00:00
llvm.SI.getlod.ll
llvm.SI.image.ll
llvm.SI.image.sample-masked.ll
llvm.SI.image.sample.ll
llvm.SI.image.sample.o.ll
llvm.SI.load.dword.ll
llvm.SI.packf16.ll
llvm.SI.sendmsg-m0.ll AMDGPU: Remove superfluous string attributes from tests 2016-07-11 23:35:48 +00:00
llvm.SI.sendmsg.ll
llvm.SI.tbuffer.store.ll
llvm.sin.ll
load-constant-f64.ll
load-constant-i1.ll
load-constant-i8.ll AMDGPU/R600: Enable Load combine 2016-08-27 19:09:43 +00:00
load-constant-i16.ll [SelectionDAG] Add BUILD_VECTOR support to computeKnownBits and SimplifyDemandedBits 2016-09-08 12:57:51 +00:00
load-constant-i32.ll AMDGPU/SI: Increase SGPR limit to 96 on Tonga/Iceland 2016-08-05 21:23:29 +00:00
load-constant-i64.ll
load-global-f32.ll
load-global-f64.ll
load-global-i1.ll
load-global-i8.ll AMDGPU/R600: Enable Load combine 2016-08-27 19:09:43 +00:00
load-global-i16.ll [SelectionDAG] Add BUILD_VECTOR support to computeKnownBits and SimplifyDemandedBits 2016-09-08 12:57:51 +00:00
load-global-i32.ll AMDGPU/SI: Implement a custom MachineSchedStrategy 2016-08-29 19:42:52 +00:00
load-global-i64.ll
load-input-fold.ll AMDGPU: Fix TargetPrefix for remaining r600 intrinsics 2016-07-15 21:27:08 +00:00
load-local-f32.ll
load-local-f64.ll
load-local-i1.ll
load-local-i8.ll AMDGPU/R600: Enable Load combine 2016-08-27 19:09:43 +00:00
load-local-i16.ll AMDGPU/SI: Improve SILoadStoreOptimizer and run it before the scheduler 2016-08-29 19:15:22 +00:00
load-local-i32.ll AMDGPU/SI: Improve SILoadStoreOptimizer and run it before the scheduler 2016-08-29 19:15:22 +00:00
load-local-i64.ll
load-weird-sizes.ll
local-64.ll AMDGPU/SI: Canonicalize offset order for merged DS instructions 2016-08-26 21:36:47 +00:00
local-atomics64.ll
local-atomics.ll
local-memory.amdgcn.ll AMDGPU/SI: Improve SILoadStoreOptimizer and run it before the scheduler 2016-08-29 19:15:22 +00:00
local-memory.ll AMDGPU/R600: Replace barrier intrinsics 2016-07-18 18:34:59 +00:00
local-memory.r600.ll AMDGPU/R600: Replace barrier intrinsics 2016-07-18 18:34:59 +00:00
local-stack-slot-bug.ll Revert "AMDGPU: Don't use offen if it is 0" 2016-10-01 02:35:24 +00:00
loop_break.ll AMDGPU: Add missing test coverage for control flow breaks 2016-07-20 15:20:35 +00:00
loop-address.ll
loop-idiom.ll
lower-range-metadata-intrinsic-call.ll
lshl.ll
lshr.ll
mad24-get-global-id.ll
mad_int24.ll
mad_uint24.ll AMDGPU/SI: Use new SimplifyDemandedBits helper for multi-use operations 2016-10-14 19:14:29 +00:00
mad-combine.ll
mad-sub.ll
madak.ll AMDGPU: Support commuting with immediate in src0 2016-09-08 17:19:29 +00:00
madmk.ll AMDGPU: Support commuting with immediate in src0 2016-09-08 17:19:29 +00:00
max3.ll
max-literals.ll AMDGPU: Fix TargetPrefix for remaining r600 intrinsics 2016-07-15 21:27:08 +00:00
max.ll
mem-builtins.ll AMDGPU: Fix crashes on memory functions 2016-08-11 17:31:42 +00:00
merge-store-crash.ll LiveIntervalAnalysis: fix a crash in repairOldRegInRange 2016-08-10 18:51:14 +00:00
merge-stores.ll AMDGPU/SI: Fix LowerParameter() for i16 arguments 2016-10-17 16:21:45 +00:00
min3.ll
min.ll
missing-store.ll AMDGPU/SI: Implement a custom MachineSchedStrategy 2016-08-29 19:42:52 +00:00
move-addr64-rsrc-dead-subreg-writes.ll AMDGPU/SI: Implement a custom MachineSchedStrategy 2016-08-29 19:42:52 +00:00
move-to-valu-atomicrmw.ll
mubuf.ll AMDGPU: Remove superfluous string attributes from tests 2016-07-11 23:35:48 +00:00
mul_int24.ll AMDGPU/SI: Use new SimplifyDemandedBits helper for multi-use operations 2016-10-14 19:14:29 +00:00
mul_uint24-amdgcn.ll AMDGPU/SI: Use new SimplifyDemandedBits helper for multi-use operations 2016-10-14 19:14:29 +00:00
mul_uint24-r600.ll [AMDGPU] Promote uniform i16 ops to i32 ops for targets that have 16 bit instructions 2016-09-28 20:05:39 +00:00
mul.ll
mulhu.ll
multilevel-break.ll AMDGPU: Allow some control flow intrinsics to be CSEd 2016-09-16 22:11:18 +00:00
no-hsa-graphics-shaders.ll
no-initializer-constant-addrspace.ll
no-shrink-extloads.ll
opencl-image-metadata.ll
operand-folding.ll AMDGPU: Don't fold subregister extracts into tied operands 2016-08-15 16:18:36 +00:00
operand-spacing.ll
or.ll AMDGPU: Improve splitting 64-bit bit ops by constants 2016-09-14 15:19:03 +00:00
over-max-lds-size.ll
packetizer.ll
parallelandifcollapse.ll
parallelorifcollapse.ll
partially-dead-super-register-immediate.ll
predicate-dp4.ll AMDGPU: Fix TargetPrefix for remaining r600 intrinsics 2016-07-15 21:27:08 +00:00
predicates.ll
private-access-no-objects.ll AMDGPU: Assume spilling will occur at -O0 2016-10-13 13:10:00 +00:00
private-element-size.ll Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled." 2016-10-13 20:23:25 +00:00
private-memory-atomics.ll
private-memory-broken.ll
private-memory-r600.ll [AMDGPU] Wave and register controls 2016-09-06 20:22:28 +00:00
promote-alloca-array-allocation.ll
promote-alloca-bitcast-function.ll
promote-alloca-globals.ll
promote-alloca-invariant-markers.ll Revert "Revert "Invariant start/end intrinsics overloaded for address space"" 2016-08-13 23:31:24 +00:00
promote-alloca-lifetime.ll AMDGPU: Fix test not actually testing anything 2016-07-14 05:23:15 +00:00
promote-alloca-mem-intrinsics.ll [AMDGPU] Wave and register controls 2016-09-06 20:22:28 +00:00
promote-alloca-no-opts.ll [AMDGPU] Wave and register controls 2016-09-06 20:22:28 +00:00
promote-alloca-padding-size-estimate.ll [AMDGPU] Wave and register controls 2016-09-06 20:22:28 +00:00
promote-alloca-shaders.ll AMDGPU: Disable AMDGPUPromoteAlloca pass for shader calling conventions. 2016-07-18 09:02:47 +00:00
promote-alloca-stored-pointer-value.ll AMDGPU: Run LoadStoreVectorizer pass by default 2016-09-09 22:29:28 +00:00
promote-alloca-to-lds-icmp.ll [AMDGPU] Wave and register controls 2016-09-06 20:22:28 +00:00
promote-alloca-to-lds-phi.ll [AMDGPU] Wave and register controls 2016-09-06 20:22:28 +00:00
promote-alloca-to-lds-select.ll [AMDGPU] Wave and register controls 2016-09-06 20:22:28 +00:00
promote-alloca-unhandled-intrinsic.ll AMDGPU: Fix test not actually testing anything 2016-07-14 05:23:15 +00:00
promote-alloca-volatile.ll
pv-packing.ll AMDGPU: Fix TargetPrefix for remaining r600 intrinsics 2016-07-15 21:27:08 +00:00
pv.ll AMDGPU: Fix TargetPrefix for remaining r600 intrinsics 2016-07-15 21:27:08 +00:00
r600-constant-array-fixup.ll AMDGPU/R600: Fix fixups used for constant arrays 2016-08-29 19:01:48 +00:00
r600-encoding.ll AMDGPU: Fix TargetPrefix for remaining r600 intrinsics 2016-07-15 21:27:08 +00:00
r600-export-fix.ll [DAG] Remove isVectorClearMaskLegal() check from vector_build dagcombine 2016-09-28 06:13:58 +00:00
r600-infinite-loop-bug-while-reorganizing-vector.ll AMDGPU: Fix TargetPrefix for remaining r600 intrinsics 2016-07-15 21:27:08 +00:00
r600.bitcast.ll AMDGPU/R600: EXTRACT_VECT_ELT should only bypass BUILD_VECTOR if the vectors have the same number of elements. 2016-09-02 20:13:19 +00:00
r600.private-memory.ll
r600.work-item-intrinsics.ll AMDGPU: Remove read_workdim intrinsic 2016-07-25 20:17:02 +00:00
r600cfg.ll AMDGPU: Fix TargetPrefix for remaining r600 intrinsics 2016-07-15 21:27:08 +00:00
rcp-pattern.ll AMDGPU/SI: Implement a custom MachineSchedStrategy 2016-08-29 19:42:52 +00:00
read_register.ll
read-register-invalid-subtarget.ll
read-register-invalid-type-i32.ll
read-register-invalid-type-i64.ll
readcyclecounter.ll
README
reduce-load-width-alignment.ll
reduce-store-width-alignment.ll
reg-coalescer-sched-crash.ll
register-count-comments.ll
rename-disconnected-bug.ll
rename-independent-subregs.mir RenameIndependentSubregs: Fix liveness query in rewriteOperands() 2016-08-03 22:37:47 +00:00
reorder-stores.ll
ret_jump.ll
ret.ll AMDGPU/SI: Implement a custom MachineSchedStrategy 2016-08-29 19:42:52 +00:00
rotl.i64.ll
rotl.ll
rotr.i64.ll
rotr.ll
rsq.ll AMDGPU: fdiv -1, x -> rcp -x 2016-08-02 22:25:04 +00:00
runtime-metadata.ll AMDGPU: Add hidden kernel arguments to runtime metadata 2016-09-07 17:44:00 +00:00
rv7x0_count3.ll AMDGPU: Fix TargetPrefix for remaining r600 intrinsics 2016-07-15 21:27:08 +00:00
s_addk_i32.ll AMDGPU: Try to commute when selecting s_addk_i32/s_mulk_i32 2016-09-08 17:35:41 +00:00
s_movk_i32.ll AMDGPU: Fix immediate folding logic when shrinking instructions 2016-09-09 23:32:53 +00:00
s_mulk_i32.ll AMDGPU: Try to commute when selecting s_addk_i32/s_mulk_i32 2016-09-08 17:35:41 +00:00
sad.ll AMDGPU/SI: Implement a custom MachineSchedStrategy 2016-08-29 19:42:52 +00:00
saddo.ll
salu-to-valu.ll AMDGPU/SI: Implement a custom MachineSchedStrategy 2016-08-29 19:42:52 +00:00
sampler-resource-id.ll
scalar_to_vector.ll
schedule-fs-loop-nested-if.ll AMDGPU: Fix TargetPrefix for remaining r600 intrinsics 2016-07-15 21:27:08 +00:00
schedule-fs-loop-nested.ll AMDGPU: Fix TargetPrefix for remaining r600 intrinsics 2016-07-15 21:27:08 +00:00
schedule-fs-loop.ll AMDGPU: Fix TargetPrefix for remaining r600 intrinsics 2016-07-15 21:27:08 +00:00
schedule-global-loads.ll AMDGPU: Run LoadStoreVectorizer pass by default 2016-09-09 22:29:28 +00:00
schedule-if-2.ll AMDGPU: Fix TargetPrefix for remaining r600 intrinsics 2016-07-15 21:27:08 +00:00
schedule-if.ll AMDGPU: Fix TargetPrefix for remaining r600 intrinsics 2016-07-15 21:27:08 +00:00
schedule-kernel-arg-loads.ll
schedule-vs-if-nested-loop-failure.ll AMDGPU/R600: Replace barrier intrinsics 2016-07-18 18:34:59 +00:00
schedule-vs-if-nested-loop.ll AMDGPU: Fix TargetPrefix for remaining r600 intrinsics 2016-07-15 21:27:08 +00:00
scheduler-subrange-crash.ll Do not consider subreg defs as reads when computing subrange liveness 2016-09-02 19:48:55 +00:00
scratch-buffer.ll Revert "AMDGPU: Don't use offen if it is 0" 2016-10-01 02:35:24 +00:00
sdiv.ll
sdivrem24.ll
sdivrem64.ll
select64.ll
select-i1.ll AMDGPU: Use unsigned compare for eq/ne 2016-09-30 01:50:20 +00:00
select-vectors.ll AMDGPU: Use unsigned compare for eq/ne 2016-09-30 01:50:20 +00:00
select.ll
selectcc-cnd.ll
selectcc-cnde-int.ll
selectcc-icmp-select-float.ll
selectcc-opt.ll AMDGPU: Use unsigned compare for eq/ne 2016-09-30 01:50:20 +00:00
selectcc.ll AMDGPU: Use unsigned compare for eq/ne 2016-09-30 01:50:20 +00:00
selected-stack-object.ll llvm/test/CodeGen/AMDGPU/selected-stack-object.ll REQUIRES +Asserts, since it expects assertion failure. 2016-07-12 02:18:09 +00:00
set-dx10.ll
setcc64.ll AMDGPU: Use unsigned compare for eq/ne 2016-09-30 01:50:20 +00:00
setcc-equivalent.ll
setcc-opt.ll AMDGPU: Use unsigned compare for eq/ne 2016-09-30 01:50:20 +00:00
setcc.ll AMDGPU: Use unsigned compare for eq/ne 2016-09-30 01:50:20 +00:00
seto.ll
setuo.ll
sext-eliminate.ll
sext-in-reg-failure-r600.ll AMDGPU: Fix introducing stack access on unaligned v16i8 2016-08-31 21:52:27 +00:00
sext-in-reg.ll
sgpr-control-flow.ll AMDGPU: Use unsigned compare for eq/ne 2016-09-30 01:50:20 +00:00
sgpr-copy-duplicate-operand.ll
sgpr-copy.ll AMDGPU: Remove superfluous string attributes from tests 2016-07-11 23:35:48 +00:00
shared-op-cycle.ll AMDGPU: Fix TargetPrefix for remaining r600 intrinsics 2016-07-15 21:27:08 +00:00
shift-and-i64-ubfe.ll AMDGPU/SI: Implement a custom MachineSchedStrategy 2016-08-29 19:42:52 +00:00
shift-and-i128-ubfe.ll AMDGPU: Improve splitting 64-bit bit ops by constants 2016-09-14 15:19:03 +00:00
shift-i64-opts.ll
shl_add_constant.ll AMDGPU/SI: Improve register allocation hints for sopk instructions 2016-08-29 13:06:10 +00:00
shl_add_ptr.ll
shl.ll
si-annotate-cf-noloop.ll AMDGPU/SI: Don't handle a loop if there is no loop at all for a terminator BB. 2016-07-28 23:01:45 +00:00
si-annotate-cf.ll AMDGPU: Use unsigned compare for eq/ne 2016-09-30 01:50:20 +00:00
si-annotate-cfg-loop-assert.ll
si-instr-info-correct-implicit-operands.ll [MIR] Print on the given output instead of stderr. 2016-07-13 20:36:03 +00:00
si-literal-folding.ll AMDGPU: Fix immediate folding logic when shrinking instructions 2016-09-09 23:32:53 +00:00
si-lod-bias.ll
si-lower-control-flow-unreachable-block.ll BranchRelaxation: Support expanding unconditional branches 2016-10-06 16:20:41 +00:00
si-scheduler.ll
si-sgpr-spill.ll
si-spill-cf.ll AMDGPU: Remove superfluous string attributes from tests 2016-07-11 23:35:48 +00:00
si-spill-sgpr-stack.ll AMDGPU: Fix missing -verify-machineinstrs in test 2016-10-03 12:58:59 +00:00
si-triv-disjoint-mem-access.ll Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled." 2016-10-13 20:23:25 +00:00
si-vector-hang.ll AMDGPU: Remove superfluous string attributes from tests 2016-07-11 23:35:48 +00:00
sign_extend.ll
simplify-demanded-bits-build-pair.ll
sint_to_fp.f64.ll AMDGPU: Use unsigned compare for eq/ne 2016-09-30 01:50:20 +00:00
sint_to_fp.i64.ll AMDGPU: Use unsigned compare for eq/ne 2016-09-30 01:50:20 +00:00
sint_to_fp.ll AMDGPU: Use unsigned compare for eq/ne 2016-09-30 01:50:20 +00:00
skip-if-dead.ll BranchRelaxation: Support expanding unconditional branches 2016-10-06 16:20:41 +00:00
smed3.ll
sminmax.ll
smrd-vccz-bug.ll AMDGPU: Support commuting with immediate in src0 2016-09-08 17:19:29 +00:00
smrd.ll
sopk-compares.ll AMDGPU: Use unsigned compare for eq/ne 2016-09-30 01:50:20 +00:00
spill-alloc-sgpr-init-bug.ll
spill-m0.ll AMDGPU: Use unsigned compare for eq/ne 2016-09-30 01:50:20 +00:00
spill-scavenge-offset.ll
split-scalar-i64-add.ll
split-smrd.ll AMDGPU: Remove superfluous string attributes from tests 2016-07-11 23:35:48 +00:00
split-vector-memoperand-offsets.ll
sra.ll
srem.ll
srl.ll
ssubo.ll
store_typed.ll
store-barrier.ll
store-global.ll AMDGPU/R600: Expand unaligned writes to local and global AS 2016-09-02 19:07:06 +00:00
store-local.ll AMDGPU/R600: Expand unaligned writes to local and global AS 2016-09-02 19:07:06 +00:00
store-v3i64.ll AMDGPU/SI: Improve SILoadStoreOptimizer and run it before the scheduler 2016-08-29 19:15:22 +00:00
store-vector-ptrs.ll
structurize1.ll
structurize.ll
sub.ll
subreg-coalescer-crash.ll AMDGPU: Remove superfluous string attributes from tests 2016-07-11 23:35:48 +00:00
subreg-coalescer-undef-use.ll AMDGPU: Use unsigned compare for eq/ne 2016-09-30 01:50:20 +00:00
subreg-eliminate-dead.ll
subreg-intervals.mir Create subranges for new intervals resulting from live interval splitting 2016-08-24 13:37:55 +00:00
swizzle-export.ll AMDGPU: Fix TargetPrefix for remaining r600 intrinsics 2016-07-15 21:27:08 +00:00
target-cpu.ll [AMDGPU] Wave and register controls 2016-09-06 20:22:28 +00:00
tex-clause-antidep.ll AMDGPU: Fix TargetPrefix for remaining r600 intrinsics 2016-07-15 21:27:08 +00:00
texture-input-merge.ll AMDGPU: Fix TargetPrefix for remaining r600 intrinsics 2016-07-15 21:27:08 +00:00
trap.ll
trunc-bitcast-vector.ll
trunc-cmp-constant.ll [AMDGPU] Promote uniform (i1, i16] operations to i32 2016-10-07 14:22:58 +00:00
trunc-store-f64-to-f16.ll
trunc-store-i1.ll
trunc-store.ll
trunc-vector-store-assertion-failure.ll
trunc.ll AMDGPU: Use unsigned compare for eq/ne 2016-09-30 01:50:20 +00:00
tti-unroll-prefs.ll
uaddo.ll
udiv.ll
udivrem24.ll
udivrem64.ll
udivrem.ll AMDGPU/SI: Implement a custom MachineSchedStrategy 2016-08-29 19:42:52 +00:00
uint_to_fp.f64.ll AMDGPU: Use unsigned compare for eq/ne 2016-09-30 01:50:20 +00:00
uint_to_fp.i64.ll AMDGPU: Use unsigned compare for eq/ne 2016-09-30 01:50:20 +00:00
uint_to_fp.ll AMDGPU: Use unsigned compare for eq/ne 2016-09-30 01:50:20 +00:00
umed3.ll
unaligned-load-store.ll AMDGPU: Fix introducing stack access on unaligned v16i8 2016-08-31 21:52:27 +00:00
undefined-subreg-liverange.ll AMDGPU: Fix verifier error from partially undef copy 2016-07-15 22:32:02 +00:00
unhandled-loop-condition-assertion.ll
uniform-branch-intrinsic-cond.ll
uniform-cfg.ll AMDGPU: Use unsigned compare for eq/ne 2016-09-30 01:50:20 +00:00
uniform-crash.ll
uniform-loop-inside-nonuniform.ll AMDGPU: Use unsigned compare for eq/ne 2016-09-30 01:50:20 +00:00
unigine-liveness-crash.ll Do not consider subreg defs as reads when computing subrange liveness 2016-09-02 19:48:55 +00:00
unknown-processor.ll
unroll.ll
unsupported-cc.ll
urecip.ll
urem.ll
use-sgpr-multiple-times.ll AMDGPU/SI: Implement a custom MachineSchedStrategy 2016-08-29 19:42:52 +00:00
usubo.ll
v1i64-kernel-arg.ll AMDGPU: Refactor kernel argument lowering 2016-09-16 21:53:00 +00:00
v_cndmask.ll
v_cvt_pk_u8_f32.ll AMDGPU : Add intrinsic for instruction v_cvt_pk_u8_f32 2016-08-11 20:34:48 +00:00
v_mac.ll AMDGPU: Remove superfluous string attributes from tests 2016-07-11 23:35:48 +00:00
valu-i1.ll AMDGPU: Use unsigned compare for eq/ne 2016-09-30 01:50:20 +00:00
vector-alloca.ll AMDGPU: Remove dead check in AMDGPUPromoteAlloca 2016-07-18 18:34:53 +00:00
vector-extract-insert.ll
vertex-fetch-encoding.ll AMDGPU/R600: Convert buffer id to VTX_READ input 2016-08-15 21:38:30 +00:00
vgpr-spill-emergency-stack-slot-compute.ll Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled." 2016-10-13 20:23:25 +00:00
vgpr-spill-emergency-stack-slot.ll Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled." 2016-10-13 20:23:25 +00:00
vi-removed-intrinsics.ll
vop-shrink.ll
vselect64.ll
vselect.ll
vtx-fetch-branch.ll
vtx-schedule.ll
wait.ll
waitcnt-flat.ll
wqm.ll AMDGPU/SI: Change mimg intrinsic signatures 2016-10-12 16:35:29 +00:00
write_register.ll
write-register-vgpr-into-sgpr.ll
wrong-transalu-pos-fix.ll AMDGPU: Remove superfluous string attributes from tests 2016-07-11 23:35:48 +00:00
xfail.r600.bitcast.ll AMDGPU/R600: EXTRACT_VECT_ELT should only bypass BUILD_VECTOR if the vectors have the same number of elements. 2016-09-02 20:13:19 +00:00
xor.ll AMDGPU: Improve splitting 64-bit bit ops by constants 2016-09-14 15:19:03 +00:00
zero_extend.ll AMDGPU: Use unsigned compare for eq/ne 2016-09-30 01:50:20 +00:00
zext-i64-bit-operand.ll

+==============================================================================+
| How to organize the lit tests                                                |
+==============================================================================+

- If you write a test for matching a single DAG opcode or intrinsic, it should
  go in a file called {opcode_name,intrinsic_name}.ll (e.g. fadd.ll)

- If you write a test that matches several DAG opcodes and checks for a single
  ISA instruction, then that test should go in a file called {ISA_name}.ll (e.g.
  bfi_int.ll

- For all other tests, use your best judgement for organizing tests and naming
  the files.

+==============================================================================+
| Naming conventions                                                           |
+==============================================================================+

- Use dash '-' and not underscore '_' to separate words in file names, unless
  the file is named after a DAG opcode or ISA instruction that has an
  underscore '_' in its name.