Simon Pilgrim b21f333bb4 [CostModel][X86] Improve AVX1/AVX2 truncation costs ... Based off the worse case numbers generated by D103695, we were overestimating the cost of a number of vector truncations: AVX2: v2i32->v2i8, v2i64->v2i16 + v4i64->v4i32 AVX1: v2i32->v2i8, v4i64->v4i16 + v16i16->v16i8 Once we have a working set of conversion costs, the intention is to cleanup the tables and use legalized types a lot more to reduce the number of entries we currently have.		2021-06-08 10:41:03 +01:00
..
AArch64	[CostModel][AArch64] NFC: Simplify some cost model tests for SVE.	2021-06-07 17:26:23 +01:00
AMDGPU	[AMDGPU][CostModel] Refine cost model for control-flow instructions.	2021-04-10 09:20:24 +03:00
ARM	[InstructionCost] Don't conflate Invalid costs with Unknown costs.	2021-03-30 09:29:42 +01:00
PowerPC	[Cost]Canonicalize the cost for logical or/and reductions.	2021-03-19 11:01:58 -07:00
RISCV	[RISCV] Expand unaligned fixed-length vector memory accesses	2021-06-02 09:27:44 +01:00
SystemZ	Revert "[NFC] remove explicit default value for strboolattr attribute in tests"	2021-05-24 19:43:40 +02:00
X86	[CostModel][X86] Improve AVX1/AVX2 truncation costs	2021-06-08 10:41:03 +01:00
free-intrinsics-datalayout.ll	[noalias.decl] Look through llvm.experimental.noalias.scope.decl	2021-01-19 20:09:42 +01:00
free-intrinsics-no_info.ll	[noalias.decl] Look through llvm.experimental.noalias.scope.decl	2021-01-19 20:09:42 +01:00
no_info.ll