David Green 48e4d991e8 [ARM] Favour PL/MI over GE/LT when possible ... The arm condition codes for GE is N==V (and for LT is N!=V). If the source of flags cannot set V (overflow), such as a cmp against #0, then we can use the simpler PL and MI conditions that only check N. As these PL/MI conditions are simpler than GE/LT, other passes like the peephole optimiser can have a better time optimising away the redundant CMPs. The exception is the VSEL instruction, which cannot take the PL code, so there the transform favours GE. Differential Revision: https://reviews.llvm.org/D64160 llvm-svn: 365117		2019-07-04 08:58:58 +00:00
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Analysis	Teach ValueTracking that aarch64.irg result aliases its input.	2019-07-03 20:19:14 +00:00
Assembler	Revert [ThinLTO] Optimize writeonly globals out	2019-07-04 00:03:30 +00:00
Bindings
Bitcode	Revert [ThinLTO] Optimize writeonly globals out	2019-07-04 00:03:30 +00:00
BugPoint
CodeGen	[ARM] Favour PL/MI over GE/LT when possible	2019-07-04 08:58:58 +00:00
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MC	[macCatalyst] Print out macCatalyst in llvm-objdump for the platform	2019-07-03 17:46:30 +00:00
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TableGen	[TableGen] Allow DAG isel patterns to override default operands.	2019-07-04 08:43:20 +00:00
ThinLTO/X86	Revert [ThinLTO] Optimize writeonly globals out	2019-07-04 00:03:30 +00:00
tools	[MachO] Add valid architecture function	2019-07-04 00:17:02 +00:00
Transforms	[PowerPC] Hardware Loop branch instruction's condition may not be icmp.	2019-07-04 01:51:47 +00:00
Unit
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lit.cfg.py
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