1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 19:23:23 +01:00
llvm-mirror/lib/Target
Evan Cheng 4d9bab5789 Add truncstore i1 patterns.
llvm-svn: 25296
2006-01-13 21:45:19 +00:00
..
Alpha make DAG isel the default 2006-01-13 18:49:47 +00:00
CBackend yet more C++ standards-compliance stuff. 2005-12-27 10:40:34 +00:00
IA64 don't be a doofus - this fixes storing bools 2006-01-13 10:28:25 +00:00
PowerPC implement stacksave/stackrestore on PPC 2006-01-13 17:52:03 +00:00
Skeleton Support multiple ValueTypes per RegisterClass, needed for upcoming vector 2005-12-01 04:51:06 +00:00
SparcV8 expand unsupported stacksave/stackrestore nodes 2006-01-13 02:42:53 +00:00
SparcV9 Support multiple ValueTypes per RegisterClass, needed for upcoming vector 2005-12-01 04:51:06 +00:00
X86 Add truncstore i1 patterns. 2006-01-13 21:45:19 +00:00
Makefile DONT_BUILD_RELINKED is gone and implied by BUILD_ARCHIVE now 2005-10-24 02:26:13 +00:00
MRegisterInfo.cpp
SubtargetFeature.cpp Preparation of supporting scheduling info. Need to find info based on selected 2005-10-25 15:15:28 +00:00
Target.td New DAG node properties SNDPInFlag, SNDPOutFlag, and SNDPOptInFlag to replace 2006-01-09 18:28:21 +00:00
TargetData.cpp
TargetFrameInfo.cpp
TargetInstrInfo.cpp
TargetLowering.cpp Lefted out TargetLowering:: 2005-12-21 23:14:54 +00:00
TargetMachine.cpp
TargetMachineRegistry.cpp
TargetSchedInfo.cpp
TargetSchedule.td add a marker 2005-10-23 22:07:20 +00:00
TargetSelectionDAG.td Add bswap, rotl, and rotr nodes 2006-01-11 21:21:00 +00:00
TargetSubtarget.cpp