mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-10-31 07:52:55 +01:00
170d2a8c25
(2xi32) (truncate ((2xi64) bitcast (buildvector i32 a, i32 x, i32 b, i32 y))) can be folded into a (2xi32) (buildvector i32 a, i32 b). Such a DAG would cause uneccessary vdup instructions followed by vmovn instructions. We generate this code on ARM NEON for a setcc olt, 2xf64, 2xf64. For example, in the vectorized version of the code below. double A[N]; double B[N]; void test_double_compare_to_double() { int i; for(i=0;i<N;i++) A[i] = (double)(A[i] < B[i]); } radar://13191881 Fixes bug 15283. llvm-svn: 175670
16 lines
501 B
LLVM
16 lines
501 B
LLVM
; RUN: llc < %s -march=arm -mcpu=cortex-a9 | FileCheck %s
|
|
; bug 15283
|
|
; radar://13191881
|
|
; CHECK: vfcmp
|
|
define void @vfcmp(<2 x double>* %a, <2 x double>* %b) {
|
|
%wide.load = load <2 x double>* %a, align 4
|
|
%wide.load2 = load <2 x double>* %b, align 4
|
|
; CHECK-NOT: vdup.32
|
|
; CHECK-NOT: vmovn.i64
|
|
%v1 = fcmp olt <2 x double> %wide.load, %wide.load2
|
|
%v2 = zext <2 x i1> %v1 to <2 x i32>
|
|
%v3 = sitofp <2 x i32> %v2 to <2 x double>
|
|
store <2 x double> %v3, <2 x double>* %b, align 4
|
|
ret void
|
|
}
|