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869fa46eae
We were assuming all SBFX-like operations would have the shl/asr form, but often when the field being extracted is an i8 or i16, we end up with a SIGN_EXTEND_INREG acting on a shift instead. Simple enough to check for though. llvm-svn: 213754
43 lines
910 B
LLVM
43 lines
910 B
LLVM
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2,+t2xtpk %s -o - \
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; RUN: | FileCheck %s
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define i32 @test0(i8 %A) {
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; CHECK-LABEL: test0:
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; CHECK: sxtb r0, r0
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%B = sext i8 %A to i32
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ret i32 %B
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}
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define signext i8 @test1(i32 %A) {
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; CHECK-LABEL: test1:
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; CHECK: sbfx r0, r0, #8, #8
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%B = lshr i32 %A, 8
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%C = shl i32 %A, 24
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%D = or i32 %B, %C
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%E = trunc i32 %D to i8
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ret i8 %E
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}
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define signext i32 @test2(i32 %A, i32 %X) {
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; CHECK-LABEL: test2:
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; CHECK: sxtab r0, r1, r0, ror #8
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%B = lshr i32 %A, 8
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%C = shl i32 %A, 24
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%D = or i32 %B, %C
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%E = trunc i32 %D to i8
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%F = sext i8 %E to i32
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%G = add i32 %F, %X
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ret i32 %G
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}
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define i32 @test3(i32 %A, i32 %X) {
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; CHECK-LABEL: test3:
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; CHECK: sxtah r0, r0, r1, ror #8
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%X.hi = lshr i32 %X, 8
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%X.trunc = trunc i32 %X.hi to i16
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%addend = sext i16 %X.trunc to i32
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%sum = add i32 %A, %addend
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ret i32 %sum
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}
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