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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-24 03:33:20 +01:00
llvm-mirror/test/CodeGen
2018-05-31 18:12:33 +00:00
..
AArch64 [AArch64] Reverted rL333427 fixing Clang UnitTest Failure 2018-05-31 08:27:53 +00:00
AMDGPU AMDGPU/R600: Make sure functions are cacheline aligned 2018-05-31 04:08:08 +00:00
ARC
ARM [ARM] Enable SETCCCARRY lowering for Thumb1. 2018-05-29 18:17:16 +00:00
AVR
BPF
Generic
Hexagon [Hexagon] Use vector align-left when shift amount fits in 3 bits 2018-05-30 13:45:34 +00:00
Inputs
Lanai
Mips [mips] Correct the predicates for a number of instructions. 2018-05-29 09:56:19 +00:00
MIR
MSP430
Nios2
NVPTX
PowerPC [PowerPC] Fix the incorrect iterator inside peephole 2018-05-29 13:38:56 +00:00
RISCV [RISCV] Add peepholes for Global Address lowering patterns 2018-05-29 19:34:54 +00:00
SPARC [Sparc] Select correct register class for FP register constraints 2018-05-30 06:07:55 +00:00
SystemZ [SystemZ] Bugfix in combineSTORE(). 2018-05-25 09:01:23 +00:00
Thumb
Thumb2
WebAssembly
WinCFGuard
WinEH
X86 Relax GOTPCREL relocations for tail jmp instructions. 2018-05-31 18:12:33 +00:00
XCore