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05fcf12f78
Summary: [ls][bh] and [ls][bh]u cannot use sp-relative addresses and must therefore lower frameindex nodes such that there is a copy to a CPU16Regs register. This is now done consistently using a separate addressing mode that does not permit frameindex nodes. As part of this I've had to remove an optimization that reduced the number of instructions needed to work around the lack of sp-relative addresses on [ls][bh] and [ls][bh]u. This optimization used one of the eight CPU16Regs registers as a copy of the stack pointer and it's implementation was the root cause of many of the register vs register class mismatches. lw/sw can use sp-relative addresses but we ought to ensure that we use the correct version of lw/sw internally for things like IAS. This is not currently the case and this change does not fix this. However, this change does clean it up sufficiently well to fix the machine verifier failures. Also removed irrelevant functions from stchar.ll. Reviewers: sdardis Subscribers: dsanders, sdardis, llvm-commits Differential Revision: http://reviews.llvm.org/D21062 llvm-svn: 272882
54 lines
1.7 KiB
C++
54 lines
1.7 KiB
C++
//===---- Mips16ISelDAGToDAG.h - A Dag to Dag Inst Selector for Mips ------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// Subclass of MipsDAGToDAGISel specialized for mips16.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_MIPS_MIPS16ISELDAGTODAG_H
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#define LLVM_LIB_TARGET_MIPS_MIPS16ISELDAGTODAG_H
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#include "MipsISelDAGToDAG.h"
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namespace llvm {
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class Mips16DAGToDAGISel : public MipsDAGToDAGISel {
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public:
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explicit Mips16DAGToDAGISel(MipsTargetMachine &TM) : MipsDAGToDAGISel(TM) {}
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private:
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std::pair<SDNode *, SDNode *> selectMULT(SDNode *N, unsigned Opc,
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const SDLoc &DL, EVT Ty, bool HasLo,
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bool HasHi);
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bool runOnMachineFunction(MachineFunction &MF) override;
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bool selectAddr(bool SPAllowed, SDValue Addr, SDValue &Base,
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SDValue &Offset);
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bool selectAddr16(SDValue Addr, SDValue &Base,
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SDValue &Offset) override;
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bool selectAddr16SP(SDValue Addr, SDValue &Base,
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SDValue &Offset) override;
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bool trySelect(SDNode *Node) override;
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void processFunctionAfterISel(MachineFunction &MF) override;
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// Insert instructions to initialize the global base register in the
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// first MBB of the function.
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void initGlobalBaseReg(MachineFunction &MF);
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void initMips16SPAliasReg(MachineFunction &MF);
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};
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FunctionPass *createMips16ISelDag(MipsTargetMachine &TM);
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}
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#endif
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