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d18a71ef85
Tablegen seg faulted when parsing a Pat where the destination part has no output (zero instruction), due to a register class lookup using nullptr. Reviewed By: Paul-C-Anagnostopoulos Differential Revision: https://reviews.llvm.org/D90829
9 lines
378 B
TableGen
9 lines
378 B
TableGen
// RUN: llvm-tblgen -gen-global-isel -optimize-match-table=false -I %p/../../include -I %p/Common %s -o /dev/null --warn-on-skipped-patterns 2>&1 < %s 2>&1 | FileCheck %s
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include "llvm/Target/Target.td"
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include "GlobalISelEmitterCommon.td"
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// CHECK: warning: Skipped pattern: Dst pattern root isn't a known leaf
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def : Pat<(zext (i16 (trunc i32:$src))),
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(i32 $src)>;
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