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llvm-mirror/test/TableGen/GlobalISelEmitter-zero-instr.td
Gabriel Hjort Åkerlund d18a71ef85 [GlobalISel][TableGen] Fix seg fault for zero instruction
Tablegen seg faulted when parsing a Pat where the destination part has
no output (zero instruction), due to a register class lookup using
nullptr.

Reviewed By: Paul-C-Anagnostopoulos

Differential Revision: https://reviews.llvm.org/D90829
2020-11-24 07:47:58 +01:00

9 lines
378 B
TableGen

// RUN: llvm-tblgen -gen-global-isel -optimize-match-table=false -I %p/../../include -I %p/Common %s -o /dev/null --warn-on-skipped-patterns 2>&1 < %s 2>&1 | FileCheck %s
include "llvm/Target/Target.td"
include "GlobalISelEmitterCommon.td"
// CHECK: warning: Skipped pattern: Dst pattern root isn't a known leaf
def : Pat<(zext (i16 (trunc i32:$src))),
(i32 $src)>;