Quentin Colombet b4d0707b26 [MIR] Check that generic virtual registers get a size. ... Without that check it was possible to write test cases where the size was not specified and we ended up with weird asserts down the road, because the default value (1) would not make sense. llvm-svn: 272226		2016-06-08 23:27:46 +00:00
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AArch64	[MIR] Check that generic virtual registers get a size.	2016-06-08 23:27:46 +00:00
AMDGPU	When printing MIR, output to errs() rather than outs().	2016-02-19 00:18:46 +00:00
ARM	ARM: fix handling of SUB immediates in peephole opt.	2016-05-02 18:30:08 +00:00
Generic	[llc] New diagnostic handler	2016-05-16 14:28:02 +00:00
Hexagon	Add test/CodeGen/MIR/Hexagon/lit.local.cfg	2016-05-26 18:35:45 +00:00
Mips	When printing MIR, output to errs() rather than outs().	2016-02-19 00:18:46 +00:00
NVPTX	When printing MIR, output to errs() rather than outs().	2016-02-19 00:18:46 +00:00
PowerPC	When printing MIR, output to errs() rather than outs().	2016-02-19 00:18:46 +00:00
X86	MIR: Fix parsing of stack object references in MachineMemOperands	2016-06-08 00:47:07 +00:00