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925690f23e
BIC is generally faster, and it can put the output in a different register from the input. We already do this in Thumb2 mode; not sure why the equivalent fix never got applied to ARM mode. Differential Revision: https://reviews.llvm.org/D31797 llvm-svn: 299803
25 lines
490 B
LLVM
25 lines
490 B
LLVM
; RUN: llc -mtriple=arm-eabi %s -o - | FileCheck %s
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define i32 @f1(i32 %a, i32 %b) {
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; CHECK-LABEL: f1:
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; CHECK: bic r0, r0, r1
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%tmp = xor i32 %b, 4294967295
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%tmp1 = and i32 %a, %tmp
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ret i32 %tmp1
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}
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define i32 @f2(i32 %a, i32 %b) {
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; CHECK-LABEL: f2:
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; CHECK: bic r0, r0, r1
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%tmp = xor i32 %b, 4294967295
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%tmp1 = and i32 %tmp, %a
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ret i32 %tmp1
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}
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define i32 @f3(i32 %a) {
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; CHECK-LABEL: f3:
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; CHECK: bic r0, r0, #255
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%tmp = and i32 %a, -256
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ret i32 %tmp
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}
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