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f59acc15ad
Summary: This is a resurrection of work first proposed and discussed in Aug 2015: http://lists.llvm.org/pipermail/llvm-dev/2015-August/089384.html and initially landed (but then backed out) in Nov 2015: http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20151109/312083.html The @llvm.memcpy/memmove/memset intrinsics currently have an explicit argument which is required to be a constant integer. It represents the alignment of the dest (and source), and so must be the minimum of the actual alignment of the two. This change is the first in a series that allows source and dest to each have their own alignments by using the alignment attribute on their arguments. In this change we: 1) Remove the alignment argument. 2) Add alignment attributes to the source & dest arguments. We, temporarily, require that the alignments for source & dest be equal. For example, code which used to read: call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 100, i32 4, i1 false) will now read call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %dest, i8* align 4 %src, i32 100, i1 false) Downstream users may have to update their lit tests that check for @llvm.memcpy/memmove/memset call/declaration patterns. The following extended sed script may help with updating the majority of your tests, but it does not catch all possible patterns so some manual checking and updating will be required. s~declare void @llvm\.mem(set|cpy|move)\.p([^(]*)\((.*), i32, i1\)~declare void @llvm.mem\1.p\2(\3, i1)~g s~call void @llvm\.memset\.p([^(]*)i8\(i8([^*]*)\* (.*), i8 (.*), i8 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i8(i8\2* \3, i8 \4, i8 \5, i1 \6)~g s~call void @llvm\.memset\.p([^(]*)i16\(i8([^*]*)\* (.*), i8 (.*), i16 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i16(i8\2* \3, i8 \4, i16 \5, i1 \6)~g s~call void @llvm\.memset\.p([^(]*)i32\(i8([^*]*)\* (.*), i8 (.*), i32 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i32(i8\2* \3, i8 \4, i32 \5, i1 \6)~g s~call void @llvm\.memset\.p([^(]*)i64\(i8([^*]*)\* (.*), i8 (.*), i64 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i64(i8\2* \3, i8 \4, i64 \5, i1 \6)~g s~call void @llvm\.memset\.p([^(]*)i128\(i8([^*]*)\* (.*), i8 (.*), i128 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i128(i8\2* \3, i8 \4, i128 \5, i1 \6)~g s~call void @llvm\.memset\.p([^(]*)i8\(i8([^*]*)\* (.*), i8 (.*), i8 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i8(i8\2* align \6 \3, i8 \4, i8 \5, i1 \7)~g s~call void @llvm\.memset\.p([^(]*)i16\(i8([^*]*)\* (.*), i8 (.*), i16 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i16(i8\2* align \6 \3, i8 \4, i16 \5, i1 \7)~g s~call void @llvm\.memset\.p([^(]*)i32\(i8([^*]*)\* (.*), i8 (.*), i32 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i32(i8\2* align \6 \3, i8 \4, i32 \5, i1 \7)~g s~call void @llvm\.memset\.p([^(]*)i64\(i8([^*]*)\* (.*), i8 (.*), i64 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i64(i8\2* align \6 \3, i8 \4, i64 \5, i1 \7)~g s~call void @llvm\.memset\.p([^(]*)i128\(i8([^*]*)\* (.*), i8 (.*), i128 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i128(i8\2* align \6 \3, i8 \4, i128 \5, i1 \7)~g s~call void @llvm\.mem(cpy|move)\.p([^(]*)i8\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i8 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i8(i8\3* \4, i8\5* \6, i8 \7, i1 \8)~g s~call void @llvm\.mem(cpy|move)\.p([^(]*)i16\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i16 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i16(i8\3* \4, i8\5* \6, i16 \7, i1 \8)~g s~call void @llvm\.mem(cpy|move)\.p([^(]*)i32\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i32 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i32(i8\3* \4, i8\5* \6, i32 \7, i1 \8)~g s~call void @llvm\.mem(cpy|move)\.p([^(]*)i64\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i64 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i64(i8\3* \4, i8\5* \6, i64 \7, i1 \8)~g s~call void @llvm\.mem(cpy|move)\.p([^(]*)i128\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i128 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i128(i8\3* \4, i8\5* \6, i128 \7, i1 \8)~g s~call void @llvm\.mem(cpy|move)\.p([^(]*)i8\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i8 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i8(i8\3* align \8 \4, i8\5* align \8 \6, i8 \7, i1 \9)~g s~call void @llvm\.mem(cpy|move)\.p([^(]*)i16\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i16 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i16(i8\3* align \8 \4, i8\5* align \8 \6, i16 \7, i1 \9)~g s~call void @llvm\.mem(cpy|move)\.p([^(]*)i32\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i32 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i32(i8\3* align \8 \4, i8\5* align \8 \6, i32 \7, i1 \9)~g s~call void @llvm\.mem(cpy|move)\.p([^(]*)i64\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i64 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i64(i8\3* align \8 \4, i8\5* align \8 \6, i64 \7, i1 \9)~g s~call void @llvm\.mem(cpy|move)\.p([^(]*)i128\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i128 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i128(i8\3* align \8 \4, i8\5* align \8 \6, i128 \7, i1 \9)~g The remaining changes in the series will: Step 2) Expand the IRBuilder API to allow creation of memcpy/memmove with differing source and dest alignments. Step 3) Update Clang to use the new IRBuilder API. Step 4) Update Polly to use the new IRBuilder API. Step 5) Update LLVM passes that create memcpy/memmove calls to use the new IRBuilder API, and those that use use MemIntrinsicInst::[get|set]Alignment() to use getDestAlignment() and getSourceAlignment() instead. Step 6) Remove the single-alignment IRBuilder API for memcpy/memmove, and the MemIntrinsicInst::[get|set]Alignment() methods. Reviewers: pete, hfinkel, lhames, reames, bollu Reviewed By: reames Subscribers: niosHD, reames, jholewinski, qcolombet, jfb, sanjoy, arsenm, dschuff, dylanmckay, mehdi_amini, sdardis, nemanjai, david2050, nhaehnle, javed.absar, sbc100, jgravelle-google, eraman, aheejin, kbarton, JDevlieghere, asb, rbar, johnrusso, simoncook, jordy.potman.lists, apazos, sabuasal, llvm-commits Differential Revision: https://reviews.llvm.org/D41675 llvm-svn: 322965
99 lines
2.7 KiB
LLVM
99 lines
2.7 KiB
LLVM
; RUN: llc < %s -mtriple=arm64-eabi -aarch64-neon-syntax=apple -mcpu=cyclone | FileCheck %s
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%struct.X = type <{ i32, i64, i64 }>
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define void @foo1(i32* %p, i64 %val) nounwind {
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; CHECK-LABEL: foo1:
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; CHECK: stur w1, [x0, #-4]
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; CHECK-NEXT: ret
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%tmp1 = trunc i64 %val to i32
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%ptr = getelementptr inbounds i32, i32* %p, i64 -1
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store i32 %tmp1, i32* %ptr, align 4
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ret void
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}
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define void @foo2(i16* %p, i64 %val) nounwind {
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; CHECK-LABEL: foo2:
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; CHECK: sturh w1, [x0, #-2]
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; CHECK-NEXT: ret
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%tmp1 = trunc i64 %val to i16
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%ptr = getelementptr inbounds i16, i16* %p, i64 -1
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store i16 %tmp1, i16* %ptr, align 2
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ret void
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}
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define void @foo3(i8* %p, i64 %val) nounwind {
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; CHECK-LABEL: foo3:
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; CHECK: sturb w1, [x0, #-1]
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; CHECK-NEXT: ret
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%tmp1 = trunc i64 %val to i8
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%ptr = getelementptr inbounds i8, i8* %p, i64 -1
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store i8 %tmp1, i8* %ptr, align 1
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ret void
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}
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define void @foo4(i16* %p, i32 %val) nounwind {
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; CHECK-LABEL: foo4:
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; CHECK: sturh w1, [x0, #-2]
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; CHECK-NEXT: ret
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%tmp1 = trunc i32 %val to i16
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%ptr = getelementptr inbounds i16, i16* %p, i32 -1
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store i16 %tmp1, i16* %ptr, align 2
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ret void
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}
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define void @foo5(i8* %p, i32 %val) nounwind {
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; CHECK-LABEL: foo5:
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; CHECK: sturb w1, [x0, #-1]
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; CHECK-NEXT: ret
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%tmp1 = trunc i32 %val to i8
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%ptr = getelementptr inbounds i8, i8* %p, i32 -1
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store i8 %tmp1, i8* %ptr, align 1
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ret void
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}
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define void @foo(%struct.X* nocapture %p) nounwind optsize ssp {
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; CHECK-LABEL: foo:
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; CHECK-NOT: str
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; CHECK: stur xzr, [x0, #12]
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; CHECK-NEXT: stur xzr, [x0, #4]
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; CHECK-NEXT: ret
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%B = getelementptr inbounds %struct.X, %struct.X* %p, i64 0, i32 1
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%val = bitcast i64* %B to i8*
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call void @llvm.memset.p0i8.i64(i8* %val, i8 0, i64 16, i1 false)
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ret void
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}
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declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1) nounwind
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; Unaligned 16b stores are split into 8b stores for performance.
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; radar://15424193
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; CHECK-LABEL: unaligned:
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; CHECK-NOT: str q0
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; CHECK: str d[[REG:[0-9]+]], [x0]
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; CHECK: ext.16b v[[REG2:[0-9]+]], v[[REG]], v[[REG]], #8
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; CHECK: str d[[REG2]], [x0, #8]
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define void @unaligned(<4 x i32>* %p, <4 x i32> %v) nounwind {
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store <4 x i32> %v, <4 x i32>* %p, align 4
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ret void
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}
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; CHECK-LABEL: aligned:
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; CHECK: str q0
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define void @aligned(<4 x i32>* %p, <4 x i32> %v) nounwind {
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store <4 x i32> %v, <4 x i32>* %p
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ret void
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}
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; Don't split one and two byte aligned stores.
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; radar://16349308
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; CHECK-LABEL: twobytealign:
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; CHECK: str q0
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define void @twobytealign(<4 x i32>* %p, <4 x i32> %v) nounwind {
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store <4 x i32> %v, <4 x i32>* %p, align 2
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ret void
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}
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; CHECK-LABEL: onebytealign:
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; CHECK: str q0
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define void @onebytealign(<4 x i32>* %p, <4 x i32> %v) nounwind {
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store <4 x i32> %v, <4 x i32>* %p, align 1
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ret void
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}
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