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d3333eef26
This is picking up a loose thread from D69006: We can simplify (zext x) ule (sext x) and (zext x) sge (sext x) to true, with various permutations. Oddly, SCEV knows about this identity, but nothing on the IR level does. Differential Revision: https://reviews.llvm.org/D83081
233 lines
6.1 KiB
LLVM
233 lines
6.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instsimplify -S | FileCheck %s
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define i1 @zext_uge_sext(i32 %x) {
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; CHECK-LABEL: @zext_uge_sext(
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; CHECK-NEXT: [[SEXT:%.*]] = sext i32 [[X:%.*]] to i64
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; CHECK-NEXT: [[ZEXT:%.*]] = zext i32 [[X]] to i64
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; CHECK-NEXT: [[CMP:%.*]] = icmp uge i64 [[ZEXT]], [[SEXT]]
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%sext = sext i32 %x to i64
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%zext = zext i32 %x to i64
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%cmp = icmp uge i64 %zext, %sext
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ret i1 %cmp
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}
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define i1 @zext_ugt_sext(i32 %x) {
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; CHECK-LABEL: @zext_ugt_sext(
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; CHECK-NEXT: ret i1 false
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;
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%sext = sext i32 %x to i64
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%zext = zext i32 %x to i64
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%cmp = icmp ugt i64 %zext, %sext
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ret i1 %cmp
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}
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define i1 @zext_ult_sext(i32 %x) {
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; CHECK-LABEL: @zext_ult_sext(
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; CHECK-NEXT: [[SEXT:%.*]] = sext i32 [[X:%.*]] to i64
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; CHECK-NEXT: [[ZEXT:%.*]] = zext i32 [[X]] to i64
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; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[ZEXT]], [[SEXT]]
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%sext = sext i32 %x to i64
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%zext = zext i32 %x to i64
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%cmp = icmp ult i64 %zext, %sext
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ret i1 %cmp
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}
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define i1 @zext_ule_sext(i32 %x) {
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; CHECK-LABEL: @zext_ule_sext(
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; CHECK-NEXT: ret i1 true
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;
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%sext = sext i32 %x to i64
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%zext = zext i32 %x to i64
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%cmp = icmp ule i64 %zext, %sext
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ret i1 %cmp
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}
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define i1 @zext_sge_sext(i32 %x) {
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; CHECK-LABEL: @zext_sge_sext(
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; CHECK-NEXT: ret i1 true
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;
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%sext = sext i32 %x to i64
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%zext = zext i32 %x to i64
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%cmp = icmp sge i64 %zext, %sext
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ret i1 %cmp
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}
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define i1 @zext_sgt_sext(i32 %x) {
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; CHECK-LABEL: @zext_sgt_sext(
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; CHECK-NEXT: [[SEXT:%.*]] = sext i32 [[X:%.*]] to i64
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; CHECK-NEXT: [[ZEXT:%.*]] = zext i32 [[X]] to i64
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; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i64 [[ZEXT]], [[SEXT]]
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%sext = sext i32 %x to i64
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%zext = zext i32 %x to i64
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%cmp = icmp sgt i64 %zext, %sext
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ret i1 %cmp
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}
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define i1 @zext_slt_sext(i32 %x) {
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; CHECK-LABEL: @zext_slt_sext(
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; CHECK-NEXT: ret i1 false
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;
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%sext = sext i32 %x to i64
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%zext = zext i32 %x to i64
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%cmp = icmp slt i64 %zext, %sext
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ret i1 %cmp
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}
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define i1 @zext_sle_sext(i32 %x) {
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; CHECK-LABEL: @zext_sle_sext(
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; CHECK-NEXT: [[SEXT:%.*]] = sext i32 [[X:%.*]] to i64
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; CHECK-NEXT: [[ZEXT:%.*]] = zext i32 [[X]] to i64
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; CHECK-NEXT: [[CMP:%.*]] = icmp sle i64 [[ZEXT]], [[SEXT]]
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%sext = sext i32 %x to i64
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%zext = zext i32 %x to i64
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%cmp = icmp sle i64 %zext, %sext
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ret i1 %cmp
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}
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define i1 @sext_uge_zext(i32 %x) {
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; CHECK-LABEL: @sext_uge_zext(
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; CHECK-NEXT: ret i1 true
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;
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%sext = sext i32 %x to i64
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%zext = zext i32 %x to i64
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%cmp = icmp uge i64 %sext, %zext
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ret i1 %cmp
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}
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define i1 @sext_ugt_zext(i32 %x) {
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; CHECK-LABEL: @sext_ugt_zext(
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; CHECK-NEXT: [[SEXT:%.*]] = sext i32 [[X:%.*]] to i64
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; CHECK-NEXT: [[ZEXT:%.*]] = zext i32 [[X]] to i64
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; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i64 [[SEXT]], [[ZEXT]]
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%sext = sext i32 %x to i64
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%zext = zext i32 %x to i64
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%cmp = icmp ugt i64 %sext, %zext
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ret i1 %cmp
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}
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define i1 @sext_ult_zext(i32 %x) {
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; CHECK-LABEL: @sext_ult_zext(
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; CHECK-NEXT: ret i1 false
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;
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%sext = sext i32 %x to i64
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%zext = zext i32 %x to i64
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%cmp = icmp ult i64 %sext, %zext
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ret i1 %cmp
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}
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define i1 @sext_ule_zext(i32 %x) {
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; CHECK-LABEL: @sext_ule_zext(
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; CHECK-NEXT: [[SEXT:%.*]] = sext i32 [[X:%.*]] to i64
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; CHECK-NEXT: [[ZEXT:%.*]] = zext i32 [[X]] to i64
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; CHECK-NEXT: [[CMP:%.*]] = icmp ule i64 [[SEXT]], [[ZEXT]]
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%sext = sext i32 %x to i64
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%zext = zext i32 %x to i64
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%cmp = icmp ule i64 %sext, %zext
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ret i1 %cmp
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}
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define i1 @sext_sge_zext(i32 %x) {
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; CHECK-LABEL: @sext_sge_zext(
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; CHECK-NEXT: [[SEXT:%.*]] = sext i32 [[X:%.*]] to i64
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; CHECK-NEXT: [[ZEXT:%.*]] = zext i32 [[X]] to i64
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; CHECK-NEXT: [[CMP:%.*]] = icmp sge i64 [[SEXT]], [[ZEXT]]
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%sext = sext i32 %x to i64
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%zext = zext i32 %x to i64
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%cmp = icmp sge i64 %sext, %zext
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ret i1 %cmp
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}
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define i1 @sext_sgt_zext(i32 %x) {
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; CHECK-LABEL: @sext_sgt_zext(
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; CHECK-NEXT: ret i1 false
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;
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%sext = sext i32 %x to i64
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%zext = zext i32 %x to i64
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%cmp = icmp sgt i64 %sext, %zext
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ret i1 %cmp
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}
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define i1 @sext_slt_zext(i32 %x) {
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; CHECK-LABEL: @sext_slt_zext(
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; CHECK-NEXT: [[SEXT:%.*]] = sext i32 [[X:%.*]] to i64
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; CHECK-NEXT: [[ZEXT:%.*]] = zext i32 [[X]] to i64
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt i64 [[SEXT]], [[ZEXT]]
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%sext = sext i32 %x to i64
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%zext = zext i32 %x to i64
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%cmp = icmp slt i64 %sext, %zext
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ret i1 %cmp
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}
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define i1 @sext_sle_zext(i32 %x) {
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; CHECK-LABEL: @sext_sle_zext(
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; CHECK-NEXT: ret i1 true
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;
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%sext = sext i32 %x to i64
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%zext = zext i32 %x to i64
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%cmp = icmp sle i64 %sext, %zext
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ret i1 %cmp
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}
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define <4 x i1> @zext_ugt_sext_vec(<4 x i32> %x) {
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; CHECK-LABEL: @zext_ugt_sext_vec(
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; CHECK-NEXT: ret <4 x i1> zeroinitializer
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;
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%sext = sext <4 x i32> %x to <4 x i64>
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%zext = zext <4 x i32> %x to <4 x i64>
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%cmp = icmp ugt <4 x i64> %zext, %sext
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ret <4 x i1> %cmp
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}
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define <4 x i1> @sext_ult_zext_vec(<4 x i32> %x) {
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; CHECK-LABEL: @sext_ult_zext_vec(
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; CHECK-NEXT: ret <4 x i1> zeroinitializer
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;
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%sext = sext <4 x i32> %x to <4 x i64>
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%zext = zext <4 x i32> %x to <4 x i64>
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%cmp = icmp ult <4 x i64> %sext, %zext
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ret <4 x i1> %cmp
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}
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define i1 @zext_ugt_sext_different_operand(i32 %x, i32 %y) {
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; CHECK-LABEL: @zext_ugt_sext_different_operand(
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; CHECK-NEXT: [[SEXT:%.*]] = sext i32 [[X:%.*]] to i64
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; CHECK-NEXT: [[ZEXT:%.*]] = zext i32 [[Y:%.*]] to i64
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; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i64 [[ZEXT]], [[SEXT]]
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%sext = sext i32 %x to i64
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%zext = zext i32 %y to i64
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%cmp = icmp ugt i64 %zext, %sext
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ret i1 %cmp
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}
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define i1 @sext_ult_zext_different_operand(i32 %x, i32 %y) {
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; CHECK-LABEL: @sext_ult_zext_different_operand(
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; CHECK-NEXT: [[SEXT:%.*]] = sext i32 [[X:%.*]] to i64
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; CHECK-NEXT: [[ZEXT:%.*]] = zext i32 [[Y:%.*]] to i64
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; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[SEXT]], [[ZEXT]]
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%sext = sext i32 %x to i64
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%zext = zext i32 %y to i64
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%cmp = icmp ult i64 %sext, %zext
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ret i1 %cmp
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}
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