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c168815f4b
Summary: The -mcpu=mips16 option caused the Integrated Assembler to crash because it couldn't figure out the architecture revision number to write to the .MIPS.abiflags section. This CPU definition has been removed because, like microMIPS, MIPS16 is an ASE to a base architecture. Reviewers: vkalintiris Subscribers: rkotler, llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D13656 llvm-svn: 250407
34 lines
1.3 KiB
LLVM
34 lines
1.3 KiB
LLVM
; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mattr=mips16 -mattr=+soft-float -mips16-hard-float -relocation-model=pic -mips16-constant-islands < %s | FileCheck %s -check-prefix=b-no-short
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; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mattr=mips16 -mattr=+soft-float -mips16-hard-float -relocation-model=pic -mips16-constant-islands < %s | FileCheck %s -check-prefix=b-long
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; ModuleID = 'brsize3.c'
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target datalayout = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32-S64"
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target triple = "mips--linux-gnu"
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; Function Attrs: noreturn nounwind optsize
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define void @foo() #0 {
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entry:
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br label %x
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x: ; preds = %x, %entry
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tail call void asm sideeffect ".space 60000", ""() #1, !srcloc !1
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br label %x
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; b-long: $BB0_1:
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; b-long: #APP
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; b-long: .space 60000
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; b-long: #NO_APP
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; b-long: b $BB0_1
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; b-no-short: $BB0_1:
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; b-no-short: #APP
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; b-no-short: .space 60000
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; b-no-short: #NO_APP
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; b-no-short-NOT: b $BB0_1 # 16 bit inst
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}
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attributes #0 = { noreturn nounwind optsize "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="true" }
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attributes #1 = { nounwind }
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!1 = !{i32 45}
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