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b5c818a5b1
llvm-mirror/test/MC/Mips/mips64r5
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Simon Dardis b5c818a5b1 Recommit: "[mips] Add rsqrt, recip for MIPS" 
Add rsqrt.[ds], recip.[ds] for MIPS. Correct the microMIPS definitions for
architecture support and register usage.

Reviewers: vkalintiris, zoran.jovanoic

Differential Review: https://reviews.llvm.org/D24499

llvm-svn: 283334
2016-10-05 16:11:01 +00:00
..
abi-bad.s [mips] Don't derive the default ABI from the CPU in the backend. 2016-06-23 12:42:53 +00:00
abiflags.s [mips] Don't derive the default ABI from the CPU in the backend. 2016-06-23 12:42:53 +00:00
invalid-mips64.s [mips] Added support for the ERETNC instruction. 2015-07-20 12:28:56 +00:00
invalid-mips64r2.s [mips] Added support for the ERETNC instruction. 2015-07-20 12:28:56 +00:00
invalid-mips64r3.s [mips] Added support for the ERETNC instruction. 2015-07-20 12:28:56 +00:00
invalid.s [mips][microMIPS] Implement LDC1, SDC1, LDC2, SDC2, LWC1, SWC1, LWC2 and SWC2 instructions and add CodeGen support 2016-07-11 07:41:56 +00:00
valid-xfail.s Recommit: "[mips] Add rsqrt, recip for MIPS" 2016-10-05 16:11:01 +00:00
valid.s Recommit: "[mips] Add rsqrt, recip for MIPS" 2016-10-05 16:11:01 +00:00