1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-25 20:23:11 +01:00
llvm-mirror/test/CodeGen/AArch64/srem-seteq-optsize.ll
Roman Lebedev 07aca076e2 [CodeGen][SelectionDAG] More efficient code for X % C == 0 (SREM case)
Summary:
This implements an optimization described in Hacker's Delight 10-17:
when `C` is constant, the result of `X % C == 0` can be computed
more cheaply without actually calculating the remainder.
The motivation is discussed here: https://bugs.llvm.org/show_bug.cgi?id=35479.

One huge caveat: this signed case is only valid for positive divisors.

While we can freely negate negative divisors, we can't negate `INT_MIN`,
so for now if `INT_MIN` is encountered, we bailout.
As a follow-up, it should be possible to handle that more gracefully
via extra `and`+`setcc`+`select`.

This passes llvm's test-suite, and from cursory(!) cross-examination
the folds (the assembly) match those of GCC, and manual checking via alive
did not reveal any issues (other than the `INT_MIN` case)

Reviewers: RKSimon, spatel, hermord, craig.topper, xbolva00

Reviewed By: RKSimon, xbolva00

Subscribers: xbolva00, thakis, javed.absar, hiraditya, dexonsmith, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65366

llvm-svn: 368702
2019-08-13 14:57:37 +00:00

40 lines
1.2 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=aarch64-unknown-linux-gnu < %s | FileCheck %s
define i32 @test_minsize(i32 %X) optsize minsize nounwind readnone {
; CHECK-LABEL: test_minsize:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #5
; CHECK-NEXT: sdiv w8, w0, w8
; CHECK-NEXT: add w8, w8, w8, lsl #2
; CHECK-NEXT: mov w9, #-10
; CHECK-NEXT: cmp w0, w8
; CHECK-NEXT: mov w8, #42
; CHECK-NEXT: csel w0, w8, w9, eq
; CHECK-NEXT: ret
%rem = srem i32 %X, 5
%cmp = icmp eq i32 %rem, 0
%ret = select i1 %cmp, i32 42, i32 -10
ret i32 %ret
}
define i32 @test_optsize(i32 %X) optsize nounwind readnone {
; CHECK-LABEL: test_optsize:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #52429
; CHECK-NEXT: mov w9, #39321
; CHECK-NEXT: movk w8, #52428, lsl #16
; CHECK-NEXT: movk w9, #6553, lsl #16
; CHECK-NEXT: mov w10, #858993459
; CHECK-NEXT: madd w8, w0, w8, w9
; CHECK-NEXT: mov w11, #-10
; CHECK-NEXT: cmp w8, w10
; CHECK-NEXT: mov w8, #42
; CHECK-NEXT: csel w0, w8, w11, lo
; CHECK-NEXT: ret
%rem = srem i32 %X, 5
%cmp = icmp eq i32 %rem, 0
%ret = select i1 %cmp, i32 42, i32 -10
ret i32 %ret
}