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c6e831c09d
Differential Revision: https://reviews.llvm.org/D43170 llvm-svn: 325030
58 lines
1.8 KiB
LLVM
58 lines
1.8 KiB
LLVM
; RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=GCN %s
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; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck --check-prefix=GCN %s
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; GCN-LABEL: {{^}}icmp_2_users:
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; GCN: s_cmp_lt_i32 s{{[0-9]+}}, 1
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; GCN: s_cbranch_scc1 [[LABEL:BB[0-9_A-Z]+]]
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; GCN: [[LABEL]]:
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; GCN-NEXT: s_endpgm
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define amdgpu_kernel void @icmp_2_users(i32 addrspace(1)* %out, i32 %cond) {
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main_body:
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%0 = icmp sgt i32 %cond, 0
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%1 = sext i1 %0 to i32
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br i1 %0, label %IF, label %ENDIF
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IF:
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store i32 %1, i32 addrspace(1)* %out
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br label %ENDIF
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ENDIF: ; preds = %IF, %main_body
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ret void
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}
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; GCN-LABEL: {{^}}fix_sgpr_live_ranges_crash:
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; GCN: s_cbranch_scc1 [[BB0:[A-Z0-9_]+]]
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; GCN: {{^}}[[LOOP:[A-Z0-9_]+]]:
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; GCN: s_cbranch_scc1 [[LOOP]]
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; GCN: {{^}}[[BB0]]:
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define amdgpu_kernel void @fix_sgpr_live_ranges_crash(i32 %arg, i32 %arg1) {
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bb:
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%cnd = trunc i32 %arg to i1
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br i1 %cnd, label %bb2, label %bb5
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bb2: ; preds = %bb
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%tmp = mul i32 10, %arg1
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br label %bb3
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bb3: ; preds = %bb3, %bb2
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%val = load volatile i32, i32 addrspace(4)* undef
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%tmp4 = icmp eq i32 %val, %arg1
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br i1 %tmp4, label %bb5, label %bb3
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bb5: ; preds = %bb3, %bb
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%tmp6 = tail call i32 @llvm.amdgcn.workitem.id.y() #1
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%tmp10 = icmp ult i32 %tmp6, %arg
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br i1 %tmp10, label %bb11, label %bb12
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bb11: ; preds = %bb11, %bb5
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br i1 undef, label %bb11, label %bb12
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bb12: ; preds = %bb11, %bb5
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ret void
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}
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; Function Attrs: nounwind readnone
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declare i32 @llvm.amdgcn.workitem.id.y() #1
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attributes #1 = { nounwind readnone }
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