Igor Breger 89090b33c3 [AVX512] Fix VFPCLASSSD/VFPCLASSSS intrinsic lowering. The i1 result should be zero extended according to SPEC. ... Differential Revision: http://reviews.llvm.org/D23489 llvm-svn: 278626		2016-08-14 13:58:57 +00:00
..
AArch64	[AArch64LoadStoreOptimizer] Check aliasing correctly when creating paired loads/stores.	2016-08-12 20:39:51 +00:00
AMDGPU	Revert "Revert "Invariant start/end intrinsics overloaded for address space""	2016-08-13 23:31:24 +00:00
ARM	Reapply [BranchFolding] Restrict tail merging loop blocks after MBP	2016-08-12 23:13:38 +00:00
BPF
Generic
Hexagon	Fix unsupported relocation type R_HEX_6_X' for symbol .rodata	2016-08-13 23:41:11 +00:00
Inputs
Lanai
Mips
MIR
MSP430
NVPTX	[NVPTX] Use untyped (.b) integer registers in PTX.	2016-08-12 22:02:19 +00:00
PowerPC	Revert "CodeGen: If Convert blocks that would form a diamond when tail-merged."	2016-08-14 02:10:18 +00:00
SPARC	Revert "[Sparc] Leon errata fix passes."	2016-08-12 14:48:09 +00:00
SystemZ
Thumb
Thumb2	Revert "CodeGen: If Convert blocks that would form a diamond when tail-merged."	2016-08-14 02:10:18 +00:00
WebAssembly	[WebAssembly] Re-enable disabled debug value test	2016-08-12 23:14:18 +00:00
WinEH
X86	[AVX512] Fix VFPCLASSSD/VFPCLASSSS intrinsic lowering. The i1 result should be zero extended according to SPEC.	2016-08-14 13:58:57 +00:00
XCore