1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2025-01-31 20:51:52 +01:00
llvm-mirror/test/CodeGen/PowerPC/aix-vector-stack.ll
Zarko Todorovski 2b76ff086c [AIX] Add support for non var_arg extended vector ABI calling convention on AIX
This patch enables passing non variadic vector type parameters on the caller and callee side and vector return on AIX that are passed in vector registers only.

So far, support is enabled for only the AIX extended Altivec ABI Calling convention.

Reviewed By: sfertile, DiggerLin

Differential Revision: https://reviews.llvm.org/D86476
2020-11-26 12:03:51 -05:00

28 lines
1.2 KiB
LLVM

; RUN: not --crash llc < %s -verify-machineinstrs -mcpu=pwr7 -mattr=+altivec \
; RUN: -vec-extabi -mtriple powerpc-ibm-aix-xcoff 2>&1 | \
; RUN: FileCheck %s --check-prefix=AIX-ERROR
; RUN: not --crash llc < %s -verify-machineinstrs -mcpu=pwr7 -mattr=+altivec \
; RUN: -vec-extabi -mtriple powerpc64-ibm-aix-xcoff 2>&1 | \
; RUN: FileCheck %s --check-prefix=AIX-ERROR
define dso_local <4 x i32> @vec_callee_stack(<4 x i32> %vec1, <4 x i32> %vec2, <4 x i32> %vec3, <4 x i32> %vec4, <4 x i32> %vec5, <4 x i32> %vec6, <4 x i32> %vec7, <4 x i32> %vec8, <4 x i32> %vec9, <4 x i32> %vec10, <4 x i32> %vec11, <4 x i32> %vec12, <4 x i32> %vec13, <4 x i32> %vec14) {
entry:
%add = add <4 x i32> %vec1, %vec2
%add1 = add <4 x i32> %add, %vec3
%add2 = add <4 x i32> %add1, %vec4
%add3 = add <4 x i32> %add2, %vec5
%add4 = add <4 x i32> %add3, %vec6
%add5 = add <4 x i32> %add4, %vec7
%add6 = add <4 x i32> %add5, %vec8
%add7 = add <4 x i32> %add6, %vec9
%add8 = add <4 x i32> %add7, %vec10
%add9 = add <4 x i32> %add8, %vec11
%add10 = add <4 x i32> %add9, %vec12
%add11 = add <4 x i32> %add10, %vec13
%add12 = add <4 x i32> %add11, %vec14
ret <4 x i32> %add12
}
; AIX-ERROR: LLVM ERROR: passing vector parameters to the stack is unimplemented for AIX