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719e95004a
This adds support for the predicted forms of branches (+/-). There are three cases to consider: - Branches using a PPC::Predicate code For these, I've added new PPC::Predicate codes corresponding to the BO values for predicted branch forms, and updated insn printing to print them correctly. I've also added new aliases for the asm parser matching the new forms. - bt/bf I've added new aliases matching to gBC etc. - bd(n)z variants I've added new instruction patterns for the predicted forms. In all cases, the new patterns are used for the asm parser only. (The new infrastructure ought to be sufficient to allow use by the compiler too at some point.) llvm-svn: 184754
64 lines
2.0 KiB
C++
64 lines
2.0 KiB
C++
//===-- PPCPredicates.h - PPC Branch Predicate Information ------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file describes the PowerPC branch predicates.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_TARGET_POWERPC_PPCPREDICATES_H
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#define LLVM_TARGET_POWERPC_PPCPREDICATES_H
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// GCC #defines PPC on Linux but we use it as our namespace name
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#undef PPC
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// Generated files will use "namespace PPC". To avoid symbol clash,
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// undefine PPC here. PPC may be predefined on some hosts.
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#undef PPC
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namespace llvm {
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namespace PPC {
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/// Predicate - These are "(BI << 5) | BO" for various predicates.
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enum Predicate {
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PRED_LT = (0 << 5) | 12,
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PRED_LE = (1 << 5) | 4,
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PRED_EQ = (2 << 5) | 12,
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PRED_GE = (0 << 5) | 4,
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PRED_GT = (1 << 5) | 12,
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PRED_NE = (2 << 5) | 4,
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PRED_UN = (3 << 5) | 12,
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PRED_NU = (3 << 5) | 4,
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PRED_LT_MINUS = (0 << 5) | 14,
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PRED_LE_MINUS = (1 << 5) | 6,
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PRED_EQ_MINUS = (2 << 5) | 14,
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PRED_GE_MINUS = (0 << 5) | 6,
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PRED_GT_MINUS = (1 << 5) | 14,
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PRED_NE_MINUS = (2 << 5) | 6,
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PRED_UN_MINUS = (3 << 5) | 14,
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PRED_NU_MINUS = (3 << 5) | 6,
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PRED_LT_PLUS = (0 << 5) | 15,
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PRED_LE_PLUS = (1 << 5) | 7,
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PRED_EQ_PLUS = (2 << 5) | 15,
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PRED_GE_PLUS = (0 << 5) | 7,
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PRED_GT_PLUS = (1 << 5) | 15,
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PRED_NE_PLUS = (2 << 5) | 7,
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PRED_UN_PLUS = (3 << 5) | 15,
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PRED_NU_PLUS = (3 << 5) | 7
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};
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/// Invert the specified predicate. != -> ==, < -> >=.
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Predicate InvertPredicate(Predicate Opcode);
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/// Assume the condition register is set by MI(a,b), return the predicate if
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/// we modify the instructions such that condition register is set by MI(b,a).
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Predicate getSwappedPredicate(Predicate Opcode);
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}
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}
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#endif
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