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63ae2eb95c
Reviewers: tra Subscribers: jholewinski, arsenm, asbirlea Differential Revision: https://reviews.llvm.org/D22592 llvm-svn: 276196
18 lines
560 B
LLVM
18 lines
560 B
LLVM
; RUN: llc < %s | FileCheck -check-prefix=ENABLED %s
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; RUN: llc -disable-nvptx-load-store-vectorizer < %s | FileCheck -check-prefix=DISABLED %s
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target triple = "nvptx64-nvidia-cuda"
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; Check that the load-store vectorizer is enabled by default for nvptx, and
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; that it's disabled by the appropriate flag.
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; ENABLED: ld.v2.{{.}}32
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; DISABLED: ld.{{.}}32
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; DISABLED: ld.{{.}}32
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define i32 @f(i32* %p) {
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%p.1 = getelementptr i32, i32* %p, i32 1
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%v0 = load i32, i32* %p, align 8
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%v1 = load i32, i32* %p.1, align 4
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%sum = add i32 %v0, %v1
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ret i32 %sum
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}
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