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llvm-mirror/test/MC
Mikhail Maltsev 304b2da27b [ARM] Do not convert some vmov instructions
Summary:
Patch https://reviews.llvm.org/D44467 implements conversion of invalid
vmov instructions into valid ones. It turned out that some valid
instructions also get converted, for example

  vmov.i64 d2, #0xff00ff00ff00ff00 ->
  vmov.i16 d2, #0xff00

Such behavior is incorrect because according to the ARM ARM section
F2.7.7 Modified immediate constants in T32 and A32 Advanced SIMD
instructions, "On assembly, the data type must be matched in the table
if possible."

This patch fixes the isNEONmovReplicate check so that the above
instruction is not modified any more.

Reviewers: rengolin, olista01

Reviewed By: rengolin

Subscribers: javed.absar, kristof.beyls, rogfer01, llvm-commits

Differential Revision: https://reviews.llvm.org/D44678

llvm-svn: 329158
2018-04-04 08:54:19 +00:00
..
AArch64 [AArch64] Add support for secrel add/load/store relocations for COFF 2018-03-01 20:42:28 +00:00
AMDGPU [AMDGPU][MC][GFX9] Added instructions v_cvt_norm_*16_f16, v_sat_pk_u8_i16 2018-04-02 17:09:20 +00:00
ARM [ARM] Do not convert some vmov instructions 2018-04-04 08:54:19 +00:00
AsmParser Use .set instead of = when printing assignment in assembly output 2018-03-27 16:44:41 +00:00
AVR
BPF bpf: New disassembler testcases for 32-bit subregister support 2018-02-23 23:49:35 +00:00
COFF [IR] Avoid the need to prefix MS C++ symbols with '\01' 2018-03-16 20:13:32 +00:00
Disassembler [AMDGPU][MC][GFX9] Added instructions v_cvt_norm_*16_f16, v_sat_pk_u8_i16 2018-04-02 17:09:20 +00:00
ELF Reapply "[DWARFv5] Emit file 0 to the line table." 2018-03-29 17:16:41 +00:00
Hexagon [Hexagon] Recognize and handle :endloop01 2018-03-30 15:29:47 +00:00
Lanai
MachO [DebugInfo] Support DWARF v5 source code embedding extension 2018-02-23 23:01:06 +00:00
Mips Use .set instead of = when printing assignment in assembly output 2018-03-27 16:44:41 +00:00
PowerPC [PowerPC] Code cleanup. Remove instructions that were withdrawn from Power 9. 2018-02-23 15:55:16 +00:00
RISCV [RISCV] Implement MC relaxations for compressed instructions. 2018-03-02 22:04:12 +00:00
Sparc
SystemZ
WebAssembly [WebAssembly] Added initial AsmParser implementation. 2018-03-20 20:06:35 +00:00
X86 [X86] Added support for nocf_check attribute for indirect Branch Tracking 2018-03-17 13:29:46 +00:00