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1431b3c2f5
This adds all CodeGen tests for the SystemZ target. This version of the patch incorporates feedback from a review by Sean Silva. Thanks to all reviewers! Patch by Richard Sandiford. llvm-svn: 181204
79 lines
3.0 KiB
LLVM
79 lines
3.0 KiB
LLVM
; Test the handling of GPR, FPR and stack arguments when integers are
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; zero-extended.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-INT
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-FLOAT
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-DOUBLE
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-FP128-1
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-FP128-2
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-STACK
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declare void @bar(i8 zeroext, i16 zeroext, i32 zeroext, i64, float, double,
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fp128, i64, float, double, i8 zeroext, i16 zeroext,
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i32 zeroext, i64, float, double, fp128)
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; There are two indirect fp128 slots, one at offset 224 (the first available
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; byte after the outgoing arguments) and one immediately after it at 240.
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; These slots should be set up outside the glued call sequence, so would
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; normally use %f0/%f2 as the first available 128-bit pair. This choice
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; is hard-coded in the FP128 tests.
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;
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; The order of the CHECK-INT loads doesn't matter. The same goes for the
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; CHECK_FP128-* stores and the CHECK-STACK stores. It would be OK to reorder
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; them in response to future code changes.
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define void @foo() {
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; CHECK-INT: foo:
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; CHECK-INT: lghi %r2, 255
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; CHECK-INT: llill %r3, 65534
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; CHECK-INT: llilf %r4, 4294967293
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; CHECK-INT: lghi %r5, -4
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; CHECK-INT: la %r6, {{224|240}}(%r15)
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; CHECK-INT: brasl %r14, bar@PLT
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;
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; CHECK-FLOAT: foo:
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; CHECK-FLOAT: lzer %f0
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; CHECK-FLOAT: lcebr %f4, %f0
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; CHECK-FLOAT: brasl %r14, bar@PLT
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;
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; CHECK-DOUBLE: foo:
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; CHECK-DOUBLE: lzdr %f2
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; CHECK-DOUBLE: lcdbr %f6, %f2
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; CHECK-DOUBLE: brasl %r14, bar@PLT
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;
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; CHECK-FP128-1: foo:
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; CHECK-FP128-1: aghi %r15, -256
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; CHECK-FP128-1: lzxr %f0
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; CHECK-FP128-1: std %f0, 224(%r15)
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; CHECK-FP128-1: std %f2, 232(%r15)
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; CHECK-FP128-1: brasl %r14, bar@PLT
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;
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; CHECK-FP128-2: foo:
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; CHECK-FP128-2: aghi %r15, -256
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; CHECK-FP128-2: lzxr %f0
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; CHECK-FP128-2: std %f0, 240(%r15)
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; CHECK-FP128-2: std %f2, 248(%r15)
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; CHECK-FP128-2: brasl %r14, bar@PLT
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;
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; CHECK-STACK: foo:
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; CHECK-STACK: aghi %r15, -256
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; CHECK-STACK: la [[REGISTER:%r[0-5]+]], {{224|240}}(%r15)
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; CHECK-STACK: stg [[REGISTER]], 216(%r15)
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; CHECK-STACK: llilf [[AT184:%r[0-5]+]], 4294967288
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; CHECK-STACK: stg [[AT184]], 184(%r15)
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; CHECK-STACK: llill [[AT176:%r[0-5]+]], 65529
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; CHECK-STACK: stg [[AT176]], 176(%r15)
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; CHECK-STACK: mvghi 208(%r15), 0
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; CHECK-STACK: mvhi 204(%r15), 0
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; CHECK-STACK: mvghi 192(%r15), -9
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; CHECK-STACK: mvghi 168(%r15), 250
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; CHECK-STACK: mvghi 160(%r15), -5
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; CHECK-STACK: brasl %r14, bar@PLT
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call void @bar (i8 -1, i16 -2, i32 -3, i64 -4, float 0.0, double 0.0,
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fp128 0xL00000000000000000000000000000000, i64 -5,
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float -0.0, double -0.0, i8 -6, i16 -7, i32 -8, i64 -9,
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float 0.0, double 0.0,
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fp128 0xL00000000000000000000000000000000)
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ret void
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}
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