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1431b3c2f5
This adds all CodeGen tests for the SystemZ target. This version of the patch incorporates feedback from a review by Sean Silva. Thanks to all reviewers! Patch by Richard Sandiford. llvm-svn: 181204
127 lines
3.2 KiB
LLVM
127 lines
3.2 KiB
LLVM
; Test incoming GPR, FPR and stack arguments when no extension type is given.
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; This type of argument is used for passing structures, etc.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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; Do some arithmetic so that we can see the register being used.
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define i8 @f1(i8 %r2) {
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; CHECK: f1:
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; CHECK: ahi %r2, 1
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; CHECK: br %r14
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%y = add i8 %r2, 1
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ret i8 %y
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}
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define i16 @f2(i8 %r2, i16 %r3) {
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; CHECK: f2:
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; CHECK: {{lr|lgr}} %r2, %r3
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; CHECK: br %r14
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ret i16 %r3
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}
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define i32 @f3(i8 %r2, i16 %r3, i32 %r4) {
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; CHECK: f3:
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; CHECK: {{lr|lgr}} %r2, %r4
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; CHECK: br %r14
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ret i32 %r4
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}
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define i64 @f4(i8 %r2, i16 %r3, i32 %r4, i64 %r5) {
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; CHECK: f4:
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; CHECK: {{lr|lgr}} %r2, %r5
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; CHECK: br %r14
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ret i64 %r5
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}
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; Do some arithmetic so that we can see the register being used.
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define float @f5(i8 %r2, i16 %r3, i32 %r4, i64 %r5, float %f0) {
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; CHECK: f5:
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; CHECK: aebr %f0, %f0
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; CHECK: br %r14
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%y = fadd float %f0, %f0
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ret float %y
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}
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define double @f6(i8 %r2, i16 %r3, i32 %r4, i64 %r5, float %f0, double %f2) {
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; CHECK: f6:
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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ret double %f2
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}
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; fp128s are passed indirectly. Do some arithmetic so that the value
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; must be interpreted as a float, rather than as a block of memory to
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; be copied.
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define void @f7(fp128 *%r2, i16 %r3, i32 %r4, i64 %r5, float %f0, double %f2,
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fp128 %r6) {
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; CHECK: f7:
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; CHECK: ld %f0, 0(%r6)
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; CHECK: ld %f2, 8(%r6)
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; CHECK: axbr %f0, %f0
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; CHECK: std %f0, 0(%r2)
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; CHECK: std %f2, 8(%r2)
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; CHECK: br %r14
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%y = fadd fp128 %r6, %r6
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store fp128 %y, fp128 *%r2
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ret void
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}
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define i64 @f8(i8 %r2, i16 %r3, i32 %r4, i64 %r5, float %f0, double %f2,
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fp128 %r6, i64 %s1) {
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; CHECK: f8:
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; CHECK: lg %r2, 160(%r15)
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; CHECK: br %r14
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ret i64 %s1
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}
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define float @f9(i8 %r2, i16 %r3, i32 %r4, i64 %r5, float %f0, double %f2,
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fp128 %r6, i64 %s1, float %f4) {
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; CHECK: f9:
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; CHECK: ler %f0, %f4
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; CHECK: br %r14
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ret float %f4
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}
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define double @f10(i8 %r2, i16 %r3, i32 %r4, i64 %r5, float %f0, double %f2,
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fp128 %r6, i64 %s1, float %f4, double %f6) {
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; CHECK: f10:
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; CHECK: ldr %f0, %f6
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; CHECK: br %r14
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ret double %f6
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}
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define i64 @f11(i8 %r2, i16 %r3, i32 %r4, i64 %r5, float %f0, double %f2,
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fp128 %r6, i64 %s1, float %f4, double %f6, i64 %s2) {
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; CHECK: f11:
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; CHECK: lg %r2, 168(%r15)
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; CHECK: br %r14
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ret i64 %s2
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}
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; Floats are passed right-justified.
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define float @f12(i8 %r2, i16 %r3, i32 %r4, i64 %r5, float %f0, double %f2,
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fp128 %r6, i64 %s1, float %f4, double %f6, i64 %s2,
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float %s3) {
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; CHECK: f12:
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; CHECK: le %f0, 180(%r15)
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; CHECK: br %r14
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ret float %s3
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}
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; Test a case where the fp128 address is passed on the stack.
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define void @f13(fp128 *%r2, i16 %r3, i32 %r4, i64 %r5, float %f0, double %f2,
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fp128 %r6, i64 %s1, float %f4, double %f6, i64 %s2,
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float %s3, fp128 %s4) {
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; CHECK: f13:
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; CHECK: lg [[REGISTER:%r[1-5]+]], 184(%r15)
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; CHECK: ld %f0, 0([[REGISTER]])
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; CHECK: ld %f2, 8([[REGISTER]])
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; CHECK: axbr %f0, %f0
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; CHECK: std %f0, 0(%r2)
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; CHECK: std %f2, 8(%r2)
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; CHECK: br %r14
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%y = fadd fp128 %s4, %s4
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store fp128 %y, fp128 *%r2
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ret void
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}
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