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c79f1aa3f4
the target if it supports the different CAST types. We didn't do this on X86 because of the different register sizes and types, but on ARM this makes sense. llvm-svn: 172245
61 lines
2.2 KiB
LLVM
61 lines
2.2 KiB
LLVM
; RUN: opt < %s -loop-vectorize -mtriple=thumbv7-apple-ios3.0.0 -mcpu=swift -S -dce | FileCheck %s
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target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32-S32"
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target triple = "thumbv7-apple-ios3.0.0"
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@b = common global [2048 x i32] zeroinitializer, align 16
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@c = common global [2048 x i32] zeroinitializer, align 16
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@a = common global [2048 x i32] zeroinitializer, align 16
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; Select VF = 8;
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;CHECK: @example1
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;CHECK: load <4 x i32>
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;CHECK: add nsw <4 x i32>
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;CHECK: store <4 x i32>
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;CHECK: ret void
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define void @example1() nounwind uwtable ssp {
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br label %1
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; <label>:1 ; preds = %1, %0
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%indvars.iv = phi i64 [ 0, %0 ], [ %indvars.iv.next, %1 ]
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%2 = getelementptr inbounds [2048 x i32]* @b, i64 0, i64 %indvars.iv
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%3 = load i32* %2, align 4
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%4 = getelementptr inbounds [2048 x i32]* @c, i64 0, i64 %indvars.iv
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%5 = load i32* %4, align 4
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%6 = add nsw i32 %5, %3
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%7 = getelementptr inbounds [2048 x i32]* @a, i64 0, i64 %indvars.iv
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store i32 %6, i32* %7, align 4
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%indvars.iv.next = add i64 %indvars.iv, 1
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%lftr.wideiv = trunc i64 %indvars.iv.next to i32
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%exitcond = icmp eq i32 %lftr.wideiv, 256
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br i1 %exitcond, label %8, label %1
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; <label>:8 ; preds = %1
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ret void
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}
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;CHECK: @example10b
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;CHECK: load <4 x i16>
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;CHECK: sext <4 x i16>
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;CHECK: store <4 x i32>
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;CHECK: ret void
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define void @example10b(i16* noalias nocapture %sa, i16* noalias nocapture %sb, i16* noalias nocapture %sc, i32* noalias nocapture %ia, i32* noalias nocapture %ib, i32* noalias nocapture %ic) nounwind uwtable ssp {
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br label %1
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; <label>:1 ; preds = %1, %0
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%indvars.iv = phi i64 [ 0, %0 ], [ %indvars.iv.next, %1 ]
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%2 = getelementptr inbounds i16* %sb, i64 %indvars.iv
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%3 = load i16* %2, align 2
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%4 = sext i16 %3 to i32
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%5 = getelementptr inbounds i32* %ia, i64 %indvars.iv
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store i32 %4, i32* %5, align 4
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%indvars.iv.next = add i64 %indvars.iv, 1
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%lftr.wideiv = trunc i64 %indvars.iv.next to i32
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%exitcond = icmp eq i32 %lftr.wideiv, 1024
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br i1 %exitcond, label %6, label %1
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; <label>:6 ; preds = %1
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ret void
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}
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