Simon Pilgrim b7289046cc [X86] Split WriteVecIMul/WriteVecPMULLD/WriteMPSAD/WritePSADBW into XMM and YMM/ZMM scheduler classes ... Also retagged VDBPSADBW instructions as SchedWritePSADBW instead of SchedWriteVecIMul which matches the behaviour on SkylakeServer (the only thing that supports it...) llvm-svn: 331445		2018-05-03 10:31:20 +00:00
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Analysis	Re-enable "[SCEV] Make computeExitLimit more simple and more powerful"	2018-05-03 02:37:55 +00:00
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CodeGen	[X86] Split WriteVecIMul/WriteVecPMULLD/WriteMPSAD/WritePSADBW into XMM and YMM/ZMM scheduler classes	2018-05-03 10:31:20 +00:00
DebugInfo	Revert "[SelectionDAG] Selection of DBG_VALUE using a PHI node result (pt 2)"	2018-05-03 07:09:33 +00:00
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MC	[WebAssembly] MC: Don't litter test directory.	2018-05-03 08:25:14 +00:00
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TableGen	[GlobalISel][InstructionSelect] Refactoring out a getMatchTable virtual method + other small NFC's	2018-05-02 20:07:15 +00:00
ThinLTO/X86
tools	[llvm-rc] Default to writing the output next to the input, if no output is specified	2018-05-02 21:15:24 +00:00
Transforms	[LoopIdiomRecognize] When looking for 'x & (x -1)' for popcnt, make sure the left hand side of the 'and' matches the left hand side of the 'subtract'	2018-05-03 05:48:49 +00:00
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