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9cc166efe6
Summary:
This patch implements a tablegen-driven Instruction Compression
mechanism for generating RISCV compressed instructions
(C Extension) from the expanded instruction form.
This tablegen backend processes CompressPat declarations in a
td file and generates all the compile-time and runtime checks
required to validate the declarations, validate the input
operands and generate correct instructions.
The checks include validating register operands, immediate
operands, fixed register operands and fixed immediate operands.
Example:
class CompressPat<dag input, dag output> {
dag Input = input;
dag Output = output;
list<Predicate> Predicates = [];
}
let Predicates = [HasStdExtC] in {
def : CompressPat<(ADD GPRNoX0:$rs1, GPRNoX0:$rs1, GPRNoX0:$rs2),
(C_ADD GPRNoX0:$rs1, GPRNoX0:$rs2)>;
}
The result is an auto-generated header file
'RISCVGenCompressEmitter.inc' which exports two functions for
compressing/uncompressing MCInst instructions, plus
some helper functions:
bool compressInst(MCInst& OutInst, const MCInst &MI,
const MCSubtargetInfo &STI,
MCContext &Context);
bool uncompressInst(MCInst& OutInst, const MCInst &MI,
const MCRegisterInfo &MRI,
const MCSubtargetInfo &STI);
The clients that include this auto-generated header file and
invoke these functions can compress an instruction before emitting
it, in the target-specific ASM or ELF streamer, or can uncompress
an instruction before printing it, when the expanded instruction
format aliases is favored.
The following clients were added to implement compression\uncompression
for RISCV:
1) RISCVAsmParser::MatchAndEmitInstruction:
Inserted a call to compressInst() to compresses instructions
parsed by llvm-mc coming from an ASM input.
2) RISCVAsmPrinter::EmitInstruction:
Inserted a call to compressInst() to compress instructions that
were lowered from Machine Instructions (MachineInstr).
3) RVInstPrinter::printInst:
Inserted a call to uncompressInst() to print the expanded
version of the instruction instead of the compressed one (e.g,
add s0, s0, a5 instead of c.add s0, a5) when -riscv-no-aliases
is not passed.
This patch squashes D45119, D42780 and D41932. It was reviewed in smaller patches by
asb, efriedma, apazos and mgrang.
Reviewers: asb, efriedma, apazos, llvm-commits, sabuasal
Reviewed By: sabuasal
Subscribers: mgorny, eraman, asb, rbar, johnrusso, simoncook, jordy.potman.lists, apazos, niosHD, kito-cheng, shiva0217, zzheng
Differential Revision: https://reviews.llvm.org/D45385
llvm-svn: 329455
93 lines
4.2 KiB
C++
93 lines
4.2 KiB
C++
//===- TableGenBackends.h - Declarations for LLVM TableGen Backends -------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the declarations for all of the LLVM TableGen
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// backends. A "TableGen backend" is just a function. See below for a
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// precise description.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_UTILS_TABLEGEN_TABLEGENBACKENDS_H
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#define LLVM_UTILS_TABLEGEN_TABLEGENBACKENDS_H
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// A TableGen backend is a function that looks like
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//
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// EmitFoo(RecordKeeper &RK, raw_ostream &OS /*, anything else you need */ )
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//
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// What you do inside of that function is up to you, but it will usually
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// involve generating C++ code to the provided raw_ostream.
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//
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// The RecordKeeper is just a top-level container for an in-memory
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// representation of the data encoded in the TableGen file. What a TableGen
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// backend does is walk around that in-memory representation and generate
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// stuff based on the information it contains.
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//
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// The in-memory representation is a node-graph (think of it like JSON but
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// with a richer ontology of types), where the nodes are subclasses of
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// Record. The methods `getClass`, `getDef` are the basic interface to
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// access the node-graph. RecordKeeper also provides a handy method
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// `getAllDerivedDefinitions`. Consult "include/llvm/TableGen/Record.h" for
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// the exact interfaces provided by Record's and RecordKeeper.
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//
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// A common pattern for TableGen backends is for the EmitFoo function to
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// instantiate a class which holds some context for the generation process,
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// and then have most of the work happen in that class's methods. This
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// pattern partly has historical roots in the previous TableGen backend API
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// that involved a class and an invocation like `FooEmitter(RK).run(OS)`.
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//
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// Remember to wrap private things in an anonymous namespace. For most
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// backends, this means that the EmitFoo function is the only thing not in
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// the anonymous namespace.
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// FIXME: Reorganize TableGen so that build dependencies can be more
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// accurately expressed. Currently, touching any of the emitters (or
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// anything that they transitively depend on) causes everything dependent
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// on TableGen to be rebuilt (this includes all the targets!). Perhaps have
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// a standalone TableGen binary and have the backends be loadable modules
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// of some sort; then the dependency could be expressed as being on the
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// module, and all the modules would have a common dependency on the
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// TableGen binary with as few dependencies as possible on the rest of
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// LLVM.
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namespace llvm {
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class raw_ostream;
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class RecordKeeper;
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void EmitIntrinsics(RecordKeeper &RK, raw_ostream &OS, bool TargetOnly = false);
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void EmitAsmMatcher(RecordKeeper &RK, raw_ostream &OS);
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void EmitAsmWriter(RecordKeeper &RK, raw_ostream &OS);
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void EmitCallingConv(RecordKeeper &RK, raw_ostream &OS);
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void EmitCodeEmitter(RecordKeeper &RK, raw_ostream &OS);
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void EmitDAGISel(RecordKeeper &RK, raw_ostream &OS);
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void EmitDFAPacketizer(RecordKeeper &RK, raw_ostream &OS);
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void EmitDisassembler(RecordKeeper &RK, raw_ostream &OS);
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void EmitFastISel(RecordKeeper &RK, raw_ostream &OS);
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void EmitInstrInfo(RecordKeeper &RK, raw_ostream &OS);
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void EmitInstrDocs(RecordKeeper &RK, raw_ostream &OS);
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void EmitPseudoLowering(RecordKeeper &RK, raw_ostream &OS);
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void EmitCompressInst(RecordKeeper &RK, raw_ostream &OS);
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void EmitRegisterInfo(RecordKeeper &RK, raw_ostream &OS);
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void EmitSubtarget(RecordKeeper &RK, raw_ostream &OS);
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void EmitMapTable(RecordKeeper &RK, raw_ostream &OS);
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void EmitOptParser(RecordKeeper &RK, raw_ostream &OS);
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void EmitCTags(RecordKeeper &RK, raw_ostream &OS);
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void EmitAttributes(RecordKeeper &RK, raw_ostream &OS);
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void EmitSearchableTables(RecordKeeper &RK, raw_ostream &OS);
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void EmitGlobalISel(RecordKeeper &RK, raw_ostream &OS);
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void EmitX86EVEX2VEXTables(RecordKeeper &RK, raw_ostream &OS);
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void EmitX86FoldTables(RecordKeeper &RK, raw_ostream &OS);
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void EmitRegisterBank(RecordKeeper &RK, raw_ostream &OS);
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} // End llvm namespace
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#endif
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