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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-21 20:12:56 +02:00
llvm-mirror/test/CodeGen
Evan Cheng b740190d2e - More refactoring. This gets rid of all of the getOpcode calls.
- This change also makes it possible to switch between ARM / Thumb on a
  per-function basis.
- Fixed thumb2 routine which expand reg + arbitrary immediate. It was using
  using ARM so_imm logic.
- Use movw and movt to do reg + imm when profitable.
- Other code clean ups and minor optimizations.

llvm-svn: 77300
2009-07-28 05:48:47 +00:00
..
Alpha Make promotion in operation legalization for SETCC work correctly. 2009-07-17 05:16:04 +00:00
ARM Add support for ARM Neon VREV instructions. 2009-07-26 00:39:34 +00:00
CBackend
CellSPU Add some generic expansion logic for SMULO and UMULO. Fixes UMULO 2009-06-16 06:58:29 +00:00
CPP
Generic Remove the IA-64 backend. 2009-07-24 00:30:09 +00:00
Mips Remove SectionKind::Small*. This was only used on mips, and is apparently 2009-07-24 03:11:51 +00:00
MSP430
PIC16 Test case to check that separate section is created for a global variable specified with section attribute. 2009-07-27 16:20:41 +00:00
PowerPC Revert r75663 (and r76805), as it is causing regressions on powerpc. 2009-07-23 00:09:46 +00:00
SPARC
SystemZ convert this test to filecheck format, which is faster and avoids false matches of "st" -> "stdin" 2009-07-21 17:36:24 +00:00
Thumb remove a very large testcase for now. 2009-07-21 06:28:36 +00:00
Thumb2 - More refactoring. This gets rid of all of the getOpcode calls. 2009-07-28 05:48:47 +00:00
X86 update testcase. 2009-07-27 15:52:58 +00:00
XCore Add tests for handling of globals and tls on the XCore. These currently fail 2009-07-24 00:38:20 +00:00