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ce9abb7e3a
Stage 2: added detailed description of operands See bug 36572: https://bugs.llvm.org/show_bug.cgi?id=36572 llvm-svn: 349368
21 lines
688 B
ReStructuredText
21 lines
688 B
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* *
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* Automatically generated file, do not edit! *
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* *
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**************************************************
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.. _amdgpu_synid8_dst_mimg_regular:
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vdst
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===========================
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Image data to load by an image instruction.
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*Size:* depends on :ref:`dmask<amdgpu_synid_dmask>` and :ref:`tfe<amdgpu_synid_tfe>`:
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* :ref:`dmask<amdgpu_synid_dmask>` may specify from 1 to 4 data elements. Each data element occupies 1 dword.
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* :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
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*Operands:* :ref:`v<amdgpu_synid_v>`
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