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571a94ef5d
This has been a very painful missing feature that has made producing reduced testcases difficult. In particular the various registers determined for stack access during function lowering were necessary to avoid undefined register errors in a large percentage of cases. Implement a subset of the important fields that need to be preserved for AMDGPU. Most of the changes are to support targets parsing register fields and properly reporting errors. The biggest sort-of bug remaining is for fields that can be initialized from the IR section will be overwritten by a default initialized machineFunctionInfo section. Another remaining bug is the machineFunctionInfo section is still printed even if empty. llvm-svn: 356215
34 lines
1.1 KiB
Plaintext
34 lines
1.1 KiB
Plaintext
;===- ./lib/Target/AMDGPU/LLVMBuild.txt ------------------------*- Conf -*--===;
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;
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; Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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; See https://llvm.org/LICENSE.txt for license information.
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; SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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;
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;===------------------------------------------------------------------------===;
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;
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; This is an LLVMBuild description file for the components in this subdirectory.
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;
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; For more information on the LLVMBuild system, please see:
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;
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; http://llvm.org/docs/LLVMBuild.html
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;
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;===------------------------------------------------------------------------===;
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[common]
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subdirectories = AsmParser Disassembler InstPrinter MCTargetDesc TargetInfo Utils
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[component_0]
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type = TargetGroup
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name = AMDGPU
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parent = Target
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has_asmparser = 1
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has_asmprinter = 1
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has_disassembler = 1
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[component_1]
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type = Library
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name = AMDGPUCodeGen
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parent = AMDGPU
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required_libraries = Analysis AsmPrinter CodeGen Core IPO MC AMDGPUAsmPrinter AMDGPUDesc AMDGPUInfo AMDGPUUtils Scalar SelectionDAG Support Target TransformUtils Vectorize GlobalISel BinaryFormat MIRParser
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add_to_library_groups = AMDGPU
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