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ab043ff680
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
llvm-svn: 230794
158 lines
4.5 KiB
LLVM
158 lines
4.5 KiB
LLVM
; Tests that check our handling of volatile instructions encountered
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; when scanning for dependencies
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; RUN: opt -basicaa -gvn -S < %s | FileCheck %s
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; Check that we can bypass a volatile load when searching
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; for dependencies of a non-volatile load
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define i32 @test1(i32* nocapture %p, i32* nocapture %q) {
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; CHECK-LABEL: test1
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; CHECK: %0 = load volatile i32, i32* %q
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; CHECK-NEXT: ret i32 0
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entry:
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%x = load i32, i32* %p
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load volatile i32, i32* %q
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%y = load i32, i32* %p
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%add = sub i32 %y, %x
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ret i32 %add
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}
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; We can not value forward if the query instruction is
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; volatile, this would be (in effect) removing the volatile load
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define i32 @test2(i32* nocapture %p, i32* nocapture %q) {
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; CHECK-LABEL: test2
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; CHECK: %x = load i32, i32* %p
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; CHECK-NEXT: %y = load volatile i32, i32* %p
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; CHECK-NEXT: %add = sub i32 %y, %x
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entry:
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%x = load i32, i32* %p
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%y = load volatile i32, i32* %p
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%add = sub i32 %y, %x
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ret i32 %add
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}
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; If the query instruction is itself volatile, we *cannot*
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; reorder it even if p and q are noalias
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define i32 @test3(i32* noalias nocapture %p, i32* noalias nocapture %q) {
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; CHECK-LABEL: test3
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; CHECK: %x = load i32, i32* %p
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; CHECK-NEXT: %0 = load volatile i32, i32* %q
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; CHECK-NEXT: %y = load volatile i32, i32* %p
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entry:
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%x = load i32, i32* %p
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load volatile i32, i32* %q
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%y = load volatile i32, i32* %p
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%add = sub i32 %y, %x
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ret i32 %add
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}
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; If an encountered instruction is both volatile and ordered,
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; we need to use the strictest ordering of either. In this
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; case, the ordering prevents forwarding.
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define i32 @test4(i32* noalias nocapture %p, i32* noalias nocapture %q) {
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; CHECK-LABEL: test4
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; CHECK: %x = load i32, i32* %p
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; CHECK-NEXT: %0 = load atomic volatile i32, i32* %q seq_cst
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; CHECK-NEXT: %y = load atomic i32, i32* %p seq_cst
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entry:
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%x = load i32, i32* %p
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load atomic volatile i32, i32* %q seq_cst, align 4
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%y = load atomic i32, i32* %p seq_cst, align 4
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%add = sub i32 %y, %x
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ret i32 %add
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}
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; Value forwarding from a volatile load is perfectly legal
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define i32 @test5(i32* nocapture %p, i32* nocapture %q) {
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; CHECK-LABEL: test5
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; CHECK: %x = load volatile i32, i32* %p
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; CHECK-NEXT: ret i32 0
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entry:
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%x = load volatile i32, i32* %p
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%y = load i32, i32* %p
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%add = sub i32 %y, %x
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ret i32 %add
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}
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; Does cross block redundancy elimination work with volatiles?
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define i32 @test6(i32* noalias nocapture %p, i32* noalias nocapture %q) {
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; CHECK-LABEL: test6
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; CHECK: %y1 = load i32, i32* %p
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; CHECK-LABEL: header
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; CHECK: %x = load volatile i32, i32* %q
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; CHECK-NEXT: %add = sub i32 %y1, %x
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entry:
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%y1 = load i32, i32* %p
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call void @use(i32 %y1)
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br label %header
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header:
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%x = load volatile i32, i32* %q
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%y = load i32, i32* %p
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%add = sub i32 %y, %x
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%cnd = icmp eq i32 %add, 0
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br i1 %cnd, label %exit, label %header
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exit:
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ret i32 %add
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}
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; Does cross block PRE work with volatiles?
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define i32 @test7(i1 %c, i32* noalias nocapture %p, i32* noalias nocapture %q) {
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; CHECK-LABEL: test7
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; CHECK-LABEL: entry.header_crit_edge:
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; CHECK: %y.pre = load i32, i32* %p
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; CHECK-LABEL: skip:
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; CHECK: %y1 = load i32, i32* %p
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; CHECK-LABEL: header:
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; CHECK: %y = phi i32
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; CHECK-NEXT: %x = load volatile i32, i32* %q
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; CHECK-NEXT: %add = sub i32 %y, %x
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entry:
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br i1 %c, label %header, label %skip
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skip:
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%y1 = load i32, i32* %p
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call void @use(i32 %y1)
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br label %header
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header:
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%x = load volatile i32, i32* %q
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%y = load i32, i32* %p
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%add = sub i32 %y, %x
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%cnd = icmp eq i32 %add, 0
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br i1 %cnd, label %exit, label %header
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exit:
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ret i32 %add
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}
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; Another volatile PRE case - two paths through a loop
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; load in preheader, one path read only, one not
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define i32 @test8(i1 %b, i1 %c, i32* noalias %p, i32* noalias %q) {
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; CHECK-LABEL: test8
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; CHECK-LABEL: entry
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; CHECK: %y1 = load i32, i32* %p
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; CHECK-LABEL: header:
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; CHECK: %y = phi i32
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; CHECK-NEXT: %x = load volatile i32, i32* %q
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; CHECK-NOT: load
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; CHECK-LABEL: skip.header_crit_edge:
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; CHECK: %y.pre = load i32, i32* %p
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entry:
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%y1 = load i32, i32* %p
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call void @use(i32 %y1)
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br label %header
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header:
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%x = load volatile i32, i32* %q
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%y = load i32, i32* %p
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call void @use(i32 %y)
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br i1 %b, label %skip, label %header
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skip:
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; escaping the arguments is explicitly required since we marked
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; them noalias
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call void @clobber(i32* %p, i32* %q)
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br i1 %c, label %header, label %exit
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exit:
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%add = sub i32 %y, %x
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ret i32 %add
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}
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declare void @use(i32) readonly
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declare void @clobber(i32* %p, i32* %q)
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