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llvm-mirror/test/CodeGen/X86/x86-64-extend-shift.ll
Jakob Stoklund Olesen 4d020cd8e5 Don't depend on the physreg coalescing order.
llvm-svn: 130818
2011-05-04 01:01:47 +00:00

11 lines
281 B
LLVM

; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
; Formerly there were two shifts.
define i64 @baz(i32 %A) nounwind {
; CHECK: shlq $49, %r
%tmp1 = shl i32 %A, 17
%tmp2 = zext i32 %tmp1 to i64
%tmp3 = shl i64 %tmp2, 32
ret i64 %tmp3
}