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e757c4f305
Instead of inserting everything after the 'root' of the reduction, insert all instructions as close to their operands as possible. This can help reduce register pressure. Differential Revision: https://reviews.llvm.org/D67392 llvm-svn: 374981
221 lines
9.0 KiB
LLVM
221 lines
9.0 KiB
LLVM
; RUN: opt -arm-parallel-dsp -mtriple=armv7-a -S %s -o - | FileCheck %s
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; CHECK-LABEL: overlap_1
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; CHECK: [[ADDR_A_1:%[^ ]+]] = getelementptr i16, i16* %a, i32 1
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; CHECK: [[ADDR_B_1:%[^ ]+]] = getelementptr i16, i16* %b, i32 1
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; CHECK: [[CAST_A:%[^ ]+]] = bitcast i16* %a to i32*
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; CHECK: [[LD_A:%[^ ]+]] = load i32, i32* [[CAST_A]]
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; CHECK: [[CAST_B:%[^ ]+]] = bitcast i16* %b to i32*
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; CHECK: [[LD_B:%[^ ]+]] = load i32, i32* [[CAST_B]]
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; CHECK: [[ACC:%[^ ]+]] = call i32 @llvm.arm.smlad(i32 [[LD_A]], i32 [[LD_B]], i32 %acc)
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; CHECK: [[CAST_A_1:%[^ ]+]] = bitcast i16* [[ADDR_A_1]] to i32*
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; CHECK: [[LD_A_1:%[^ ]+]] = load i32, i32* [[CAST_A_1]]
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; CHECK: [[CAST_B_1:%[^ ]+]] = bitcast i16* [[ADDR_B_1]] to i32*
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; CHECK: [[LD_B_1:%[^ ]+]] = load i32, i32* [[CAST_B_1]]
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; CHECK: [[RES:%[^ ]+]] = call i32 @llvm.arm.smlad(i32 [[LD_A_1]], i32 [[LD_B_1]], i32 [[ACC]])
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; CHECK: ret i32 [[RES]]
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define i32 @overlap_1(i16* %a, i16* %b, i32 %acc) {
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entry:
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%addr.a.1 = getelementptr i16, i16* %a, i32 1
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%addr.b.1 = getelementptr i16, i16* %b, i32 1
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%ld.a.0 = load i16, i16* %a
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%sext.a.0 = sext i16 %ld.a.0 to i32
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%ld.b.0 = load i16, i16* %b
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%ld.a.1 = load i16, i16* %addr.a.1
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%ld.b.1 = load i16, i16* %addr.b.1
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%sext.a.1 = sext i16 %ld.a.1 to i32
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%sext.b.1 = sext i16 %ld.b.1 to i32
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%sext.b.0 = sext i16 %ld.b.0 to i32
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%mul.0 = mul i32 %sext.a.0, %sext.b.0
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%mul.1 = mul i32 %sext.a.1, %sext.b.1
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%addr.a.2 = getelementptr i16, i16* %a, i32 2
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%addr.b.2 = getelementptr i16, i16* %b, i32 2
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%ld.a.2 = load i16, i16* %addr.a.2
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%ld.b.2 = load i16, i16* %addr.b.2
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%sext.a.2 = sext i16 %ld.a.2 to i32
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%sext.b.2 = sext i16 %ld.b.2 to i32
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%mul.2 = mul i32 %sext.a.2, %sext.b.2
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%add = add i32 %mul.0, %mul.1
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%add.1 = add i32 %mul.1, %mul.2
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%add.2 = add i32 %add.1, %add
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%res = add i32 %add.2, %acc
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ret i32 %res
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}
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; TODO: Is it really best to generate smlald for the first instruction? Does
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; this just increase register pressure unnecessarily?
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; CHECK-LABEL: overlap_64_1
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; CHECK: [[ADDR_A_1:%[^ ]+]] = getelementptr i16, i16* %a, i32 1
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; CHECK: [[ADDR_B_1:%[^ ]+]] = getelementptr i16, i16* %b, i32 1
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; CHECK: [[CAST_A:%[^ ]+]] = bitcast i16* %a to i32*
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; CHECK: [[LD_A:%[^ ]+]] = load i32, i32* [[CAST_A]]
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; CHECK: [[CAST_B:%[^ ]+]] = bitcast i16* %b to i32*
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; CHECK: [[LD_B:%[^ ]+]] = load i32, i32* [[CAST_B]]
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; CHECK: [[ACC:%[^ ]+]] = call i64 @llvm.arm.smlald(i32 [[LD_A]], i32 [[LD_B]], i64 %acc)
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; CHECK: [[CAST_A_1:%[^ ]+]] = bitcast i16* [[ADDR_A_1]] to i32*
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; CHECK: [[LD_A_1:%[^ ]+]] = load i32, i32* [[CAST_A_1]]
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; CHECK: [[CAST_B_1:%[^ ]+]] = bitcast i16* [[ADDR_B_1]] to i32*
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; CHECK: [[LD_B_1:%[^ ]+]] = load i32, i32* [[CAST_B_1]]
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; CHECK: [[RES:%[^ ]+]] = call i64 @llvm.arm.smlald(i32 [[LD_A_1]], i32 [[LD_B_1]], i64 [[ACC]])
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; CHECK: ret i64 [[RES]]
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define i64 @overlap_64_1(i16* %a, i16* %b, i64 %acc) {
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entry:
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%addr.a.1 = getelementptr i16, i16* %a, i32 1
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%addr.b.1 = getelementptr i16, i16* %b, i32 1
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%ld.a.0 = load i16, i16* %a
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%sext.a.0 = sext i16 %ld.a.0 to i32
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%ld.b.0 = load i16, i16* %b
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%ld.a.1 = load i16, i16* %addr.a.1
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%ld.b.1 = load i16, i16* %addr.b.1
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%sext.a.1 = sext i16 %ld.a.1 to i32
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%sext.b.1 = sext i16 %ld.b.1 to i32
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%sext.b.0 = sext i16 %ld.b.0 to i32
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%mul.0 = mul i32 %sext.a.0, %sext.b.0
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%mul.1 = mul i32 %sext.a.1, %sext.b.1
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%addr.a.2 = getelementptr i16, i16* %a, i32 2
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%addr.b.2 = getelementptr i16, i16* %b, i32 2
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%ld.a.2 = load i16, i16* %addr.a.2
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%ld.b.2 = load i16, i16* %addr.b.2
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%sext.a.2 = sext i16 %ld.a.2 to i32
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%sext.b.2 = sext i16 %ld.b.2 to i32
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%mul.2 = mul i32 %sext.a.2, %sext.b.2
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%add = add i32 %mul.0, %mul.1
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%add.1 = add i32 %mul.1, %mul.2
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%sext.add = sext i32 %add to i64
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%sext.add.1 = sext i32 %add.1 to i64
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%add.2 = add i64 %sext.add.1, %sext.add
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%res = add i64 %add.2, %acc
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ret i64 %res
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}
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; CHECK-LABEL: overlap_2
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; CHECK: [[ADDR_A_1:%[^ ]+]] = getelementptr i16, i16* %a, i32 1
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; CHECK: [[ADDR_B_1:%[^ ]+]] = getelementptr i16, i16* %b, i32 1
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; CHECK: [[CAST_A:%[^ ]+]] = bitcast i16* %a to i32*
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; CHECK: [[LD_A:%[^ ]+]] = load i32, i32* [[CAST_A]]
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; CHECK: [[CAST_B:%[^ ]+]] = bitcast i16* %b to i32*
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; CHECK: [[LD_B:%[^ ]+]] = load i32, i32* [[CAST_B]]
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; CHECK: [[ACC1:%[^ ]+]] = add i32 %mul.1, %acc
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; CHECK: [[ACC2:%[^ ]+]] = add i32 %mul.2, [[ACC1]]
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; CHECK: [[RES:%[^ ]+]] = call i32 @llvm.arm.smlad(i32 [[LD_A]], i32 [[LD_B]], i32 [[ACC2]])
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; CHECK: ret i32 [[RES]]
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define i32 @overlap_2(i16* %a, i16* %b, i32 %acc) {
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entry:
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%addr.a.1 = getelementptr i16, i16* %a, i32 1
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%addr.b.1 = getelementptr i16, i16* %b, i32 1
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%ld.a.0 = load i16, i16* %a
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%sext.a.0 = sext i16 %ld.a.0 to i32
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%ld.b.0 = load i16, i16* %b
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%ld.a.1 = load i16, i16* %addr.a.1
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%ld.b.1 = load i16, i16* %addr.b.1
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%sext.a.1 = sext i16 %ld.a.1 to i32
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%sext.b.1 = sext i16 %ld.b.1 to i32
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%sext.b.0 = sext i16 %ld.b.0 to i32
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%mul.0 = mul i32 %sext.a.0, %sext.b.0
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%mul.1 = mul i32 %sext.a.1, %sext.b.1
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%addr.a.2 = getelementptr i16, i16* %a, i32 2
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%addr.b.2 = getelementptr i16, i16* %b, i32 2
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%ld.a.2 = load i16, i16* %addr.a.2
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%ld.b.2 = load i16, i16* %addr.b.2
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%sext.a.2 = sext i16 %ld.a.2 to i32
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%sext.b.2 = sext i16 %ld.b.2 to i32
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%mul.2 = mul i32 %sext.b.2, %sext.a.2
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%add = add i32 %mul.0, %mul.1
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%add.1 = add i32 %mul.1, %mul.2
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%add.2 = add i32 %add, %add.1
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%res = add i32 %add.2, %acc
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ret i32 %res
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}
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; CHECK-LABEL: overlap_3
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; CHECK: [[GEP_B:%[^ ]+]] = getelementptr i16, i16* %b, i32 1
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; CHECK: [[CAST_A:%[^ ]+]] = bitcast i16* %a to i32*
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; CHECK: [[LD_A:%[^ ]+]] = load i32, i32* [[CAST_A]]
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; CHECK: [[CAST_B:%[^ ]+]] = bitcast i16* %b to i32*
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; CHECK: [[LD_B:%[^ ]+]] = load i32, i32* [[CAST_B]]
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; CHECK: [[SMLAD:%[^ ]+]] = call i32 @llvm.arm.smlad(i32 [[LD_A]], i32 [[LD_B]], i32 %acc)
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; CHECK: [[CAST_B_1:%[^ ]+]] = bitcast i16* [[GEP_B]] to i32*
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; CHECK: [[LD_B_1:%[^ ]+]] = load i32, i32* [[CAST_B_1]]
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; CHECK: [[GEP_A:%[^ ]+]] = getelementptr i16, i16* %a, i32 2
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; CHECK: [[CAST_A_2:%[^ ]+]] = bitcast i16* [[GEP_A]] to i32*
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; CHECK: [[LD_A_2:%[^ ]+]] = load i32, i32* [[CAST_A_2]]
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; CHECK: [[RES:%[^ ]+]] = call i32 @llvm.arm.smlad(i32 [[LD_A_2]], i32 [[LD_B_1]], i32 [[SMLAD]])
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; CHECK: ret i32 [[RES]]
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define i32 @overlap_3(i16* %a, i16* %b, i32 %acc) {
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entry:
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%addr.a.1 = getelementptr i16, i16* %a, i32 1
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%addr.b.1 = getelementptr i16, i16* %b, i32 1
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%ld.a.0 = load i16, i16* %a
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%sext.a.0 = sext i16 %ld.a.0 to i32
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%ld.b.0 = load i16, i16* %b
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%ld.a.1 = load i16, i16* %addr.a.1
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%ld.b.1 = load i16, i16* %addr.b.1
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%sext.a.1 = sext i16 %ld.a.1 to i32
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%sext.b.1 = sext i16 %ld.b.1 to i32
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%sext.b.0 = sext i16 %ld.b.0 to i32
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%mul.0 = mul i32 %sext.a.0, %sext.b.0
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%mul.1 = mul i32 %sext.a.1, %sext.b.1
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%addr.a.2 = getelementptr i16, i16* %a, i32 2
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%addr.b.2 = getelementptr i16, i16* %b, i32 2
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%addr.a.3 = getelementptr i16, i16* %a, i32 3
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%ld.a.2 = load i16, i16* %addr.a.2
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%ld.b.2 = load i16, i16* %addr.b.2
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%ld.a.3 = load i16, i16* %addr.a.3
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%sext.a.2 = sext i16 %ld.a.2 to i32
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%sext.b.2 = sext i16 %ld.b.2 to i32
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%sext.a.3 = sext i16 %ld.a.3 to i32
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%mul.2 = mul i32 %sext.a.2, %sext.b.1
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%mul.3 = mul i32 %sext.a.3, %sext.b.2
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%add = add i32 %mul.0, %mul.1
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%add.1 = add i32 %mul.2, %mul.3
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%add.2 = add i32 %add.1, %add
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%res = add i32 %add.2, %acc
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ret i32 %res
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}
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; CHECK-LABEL: overlap_4
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; CHECK: [[GEP_B:%[^ ]+]] = getelementptr i16, i16* %b, i32 1
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; CHECK: [[CAST_A:%[^ ]+]] = bitcast i16* %a to i32*
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; CHECK: [[LD_A:%[^ ]+]] = load i32, i32* [[CAST_A]]
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; CHECK: [[CAST_B:%[^ ]+]] = bitcast i16* %b to i32*
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; CHECK: [[LD_B:%[^ ]+]] = load i32, i32* [[CAST_B]]
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; CHECK: [[SMLAD:%[^ ]+]] = call i32 @llvm.arm.smlad(i32 [[LD_A]], i32 [[LD_B]], i32 %acc)
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; CHECK: [[CAST_B_1:%[^ ]+]] = bitcast i16* [[GEP_B]] to i32*
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; CHECK: [[LD_B_1:%[^ ]+]] = load i32, i32* [[CAST_B_1]]
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; CHECK: [[GEP_A:%[^ ]+]] = getelementptr i16, i16* %a, i32 2
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; CHECK: [[CAST_A_2:%[^ ]+]] = bitcast i16* [[GEP_A]] to i32*
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; CHECK: [[LD_A_2:%[^ ]+]] = load i32, i32* [[CAST_A_2]]
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; CHECK: [[RES:%[^ ]+]] = call i32 @llvm.arm.smladx(i32 [[LD_A_2]], i32 [[LD_B_1]], i32 [[SMLAD]])
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; CHECK: ret i32 [[RES]]
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define i32 @overlap_4(i16* %a, i16* %b, i32 %acc) {
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entry:
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%addr.a.1 = getelementptr i16, i16* %a, i32 1
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%addr.b.1 = getelementptr i16, i16* %b, i32 1
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%ld.a.0 = load i16, i16* %a
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%sext.a.0 = sext i16 %ld.a.0 to i32
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%ld.b.0 = load i16, i16* %b
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%ld.a.1 = load i16, i16* %addr.a.1
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%ld.b.1 = load i16, i16* %addr.b.1
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%sext.a.1 = sext i16 %ld.a.1 to i32
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%sext.b.1 = sext i16 %ld.b.1 to i32
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%sext.b.0 = sext i16 %ld.b.0 to i32
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%mul.0 = mul i32 %sext.a.0, %sext.b.0
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%mul.1 = mul i32 %sext.a.1, %sext.b.1
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%addr.a.2 = getelementptr i16, i16* %a, i32 2
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%addr.b.2 = getelementptr i16, i16* %b, i32 2
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%addr.a.3 = getelementptr i16, i16* %a, i32 3
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%ld.a.2 = load i16, i16* %addr.a.2
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%ld.b.2 = load i16, i16* %addr.b.2
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%ld.a.3 = load i16, i16* %addr.a.3
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%sext.a.2 = sext i16 %ld.a.2 to i32
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%sext.b.2 = sext i16 %ld.b.2 to i32
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%sext.a.3 = sext i16 %ld.a.3 to i32
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%mul.2 = mul i32 %sext.b.2, %sext.a.2
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%mul.3 = mul i32 %sext.b.1, %sext.a.3
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%add = add i32 %mul.0, %mul.1
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%add.1 = add i32 %mul.2, %mul.3
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%add.2 = add i32 %add.1, %add
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%res = add i32 %add.2, %acc
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ret i32 %res
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}
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