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When splitting a live range immediately before an LDR_POST instruction that redefines the address register, make sure to use the correct value number in leaveIntvBefore. We need the value number entering the instruction. <rdar://problem/9793765> llvm-svn: 135413
33 lines
1.7 KiB
LLVM
33 lines
1.7 KiB
LLVM
; RUN: llc -disable-fp-elim -relocation-model=pic < %s
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target triple = "armv6-apple-ios"
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; Reduced from 177.mesa. This test causes a live range split before an LDR_POST instruction.
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; That requires leaveIntvBefore to be very accurate about the redefined value number.
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define internal void @sample_nearest_3d(i8* nocapture %tObj, i32 %n, float* nocapture %s, float* nocapture %t, float* nocapture %u, float* nocapture %lambda, i8* nocapture %red, i8* nocapture %green, i8* nocapture %blue, i8* nocapture %alpha) nounwind ssp {
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entry:
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br i1 undef, label %for.end, label %for.body.lr.ph
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for.body.lr.ph: ; preds = %entry
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br label %for.body
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for.body: ; preds = %for.body, %for.body.lr.ph
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%i.031 = phi i32 [ 0, %for.body.lr.ph ], [ %0, %for.body ]
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%arrayidx11 = getelementptr float* %t, i32 %i.031
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%arrayidx15 = getelementptr float* %u, i32 %i.031
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%arrayidx19 = getelementptr i8* %red, i32 %i.031
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%arrayidx22 = getelementptr i8* %green, i32 %i.031
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%arrayidx25 = getelementptr i8* %blue, i32 %i.031
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%arrayidx28 = getelementptr i8* %alpha, i32 %i.031
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%tmp12 = load float* %arrayidx11, align 4
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tail call fastcc void @sample_3d_nearest(i8* %tObj, i8* undef, float undef, float %tmp12, float undef, i8* %arrayidx19, i8* %arrayidx22, i8* %arrayidx25, i8* %arrayidx28)
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%0 = add i32 %i.031, 1
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%exitcond = icmp eq i32 %0, %n
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br i1 %exitcond, label %for.end, label %for.body
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for.end: ; preds = %for.body, %entry
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ret void
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}
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declare fastcc void @sample_3d_nearest(i8* nocapture, i8* nocapture, float, float, float, i8* nocapture, i8* nocapture, i8* nocapture, i8* nocapture) nounwind ssp
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