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4a09216dfb
1. The ST*UX instructions that store and update the stack pointer did not set define/kill on R1. This became a problem when I activated post-RA scheduling (and had incorrectly adjusted the Frames-large test). 2. eliminateFrameIndex did not kill its scavenged temporary register, and this could cause the scavenger to exhaust all available registers (and its emergency spill slot) when there were a lot of CR values to spill. The 2010-02-12-saveCR test has been adjusted to check for this. llvm-svn: 147359
56 lines
1.4 KiB
LLVM
56 lines
1.4 KiB
LLVM
; RUN: llvm-as < %s > %t.bc
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; RUN: llc < %t.bc -march=ppc32 | FileCheck %s -check-prefix=PPC32-NOFP
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; RUN: llc < %t.bc -march=ppc32 -disable-fp-elim | FileCheck %s -check-prefix=PPC32-FP
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; RUN: llc < %t.bc -march=ppc64 | FileCheck %s -check-prefix=PPC64-NOFP
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; RUN: llc < %t.bc -march=ppc64 -disable-fp-elim | FileCheck %s -check-prefix=PPC64-FP
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target triple = "powerpc-apple-darwin8"
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define i32* @f1() nounwind {
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%tmp = alloca i32, i32 8191 ; <i32*> [#uses=1]
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ret i32* %tmp
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}
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; PPC32-NOFP: _f1:
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; PPC32-NOFP: lis r0, -1
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; PPC32-NOFP: ori r0, r0, 32704
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; PPC32-NOFP: stwux r1, r1, r0
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; PPC32-NOFP: addi r3, r1, 68
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; PPC32-NOFP: lwz r1, 0(r1)
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; PPC32-NOFP: blr
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; PPC32-FP: _f1:
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; PPC32-FP: lis r0, -1
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; PPC32-FP: stw r31, -4(r1)
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; PPC32-FP: ori r0, r0, 32704
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; PPC32-FP: stwux r1, r1, r0
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; PPC32-FP: mr r31, r1
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; PPC32-FP: addi r3, r31, 64
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; PPC32-FP: lwz r1, 0(r1)
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; PPC32-FP: lwz r31, -4(r1)
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; PPC32-FP: blr
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; PPC64-NOFP: _f1:
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; PPC64-NOFP: lis r0, -1
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; PPC64-NOFP: ori r0, r0, 32656
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; PPC64-NOFP: stdux r1, r1, r0
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; PPC64-NOFP: addi r3, r1, 116
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; PPC64-NOFP: ld r1, 0(r1)
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; PPC64-NOFP: blr
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; PPC64-FP: _f1:
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; PPC64-FP: lis r0, -1
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; PPC64-FP: std r31, -8(r1)
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; PPC64-FP: ori r0, r0, 32640
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; PPC64-FP: stdux r1, r1, r0
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; PPC64-FP: mr r31, r1
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; PPC64-FP: addi r3, r31, 124
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; PPC64-FP: ld r1, 0(r1)
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; PPC64-FP: ld r31, -8(r1)
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; PPC64-FP: blr
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