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2f13163a84
This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. llvm-svn: 205090
9 lines
203 B
LLVM
9 lines
203 B
LLVM
; RUN: llc < %s -march=arm64 | FileCheck %s
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define float @t1(i1 %a, float %b, float %c) nounwind {
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; CHECK: t1
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; CHECK: fcsel s0, s0, s1, ne
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%sel = select i1 %a, float %b, float %c
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ret float %sel
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}
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