1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-24 19:52:54 +01:00
llvm-mirror/test/MC/AsmParser/x86_instructions.s
Daniel Dunbar dc5840c57c Update llvm-mc / MCAsmStreamer to print the instruction using the actual target
specific printer (this only works on x86, for now).
 - This makes it possible to do some correctness checking of the parsing and
   matching, since we can compare the results of 'as' on the original input, to
   those of 'as' on the output from llvm-mc.

 - In theory, we could now have an easy ATT -> Intel syntax converter. :)

llvm-svn: 78986
2009-08-14 03:48:55 +00:00

59 lines
1.5 KiB
ArmAsm

// FIXME: Switch back to FileCheck once we print actual instructions
// RUN: llvm-mc -triple x86_64-unknown-unknown %s | FileCheck %s
// CHECK: subb %al, %al
subb %al, %al
// CHECK: addl $24, %eax
addl $24, %eax
// CHECK: movl %eax, 10(%ebp)
movl %eax, 10(%ebp)
// CHECK: movl %eax, 10(%ebp,%ebx)
movl %eax, 10(%ebp, %ebx)
// CHECK: movl %eax, 10(%ebp,%ebx,4)
movl %eax, 10(%ebp, %ebx, 4)
// CHECK: movl %eax, 10(,%ebx,4)
movl %eax, 10(, %ebx, 4)
// FIXME: Check that this matches SUB32ri8
// CHECK: subl $1, %eax
subl $1, %eax
// FIXME: Check that this matches SUB32ri8
// CHECK: subl $-1, %eax
subl $-1, %eax
// FIXME: Check that this matches SUB32ri
// CHECK: subl $256, %eax
subl $256, %eax
// FIXME: Check that this matches XOR64ri8
// CHECK: xorq $1, %rax
xorq $1, %rax
// FIXME: Check that this matches XOR64ri32
// CHECK: xorq $256, %rax
xorq $256, %rax
// FIXME: Check that this matches SUB8rr
// CHECK: subb %al, %bl
subb %al, %bl
// FIXME: Check that this matches SUB16rr
// CHECK: subw %ax, %bx
subw %ax, %bx
// FIXME: Check that this matches SUB32rr
// CHECK: subl %eax, %ebx
subl %eax, %ebx
// FIXME: Check that this matches the correct instruction.
// CHECK: call *%rax
call *%rax
// FIXME: Check that this matches the correct instruction.
// CHECK: shldl %cl, %eax, %ebx
shldl %cl, %eax, %ebx