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9b69e7166c
X86FrameLowering::adjustForHiPEPrologue() contains a hard-coded offset
into an Erlang Runtime System-internal data structure (the PCB). As the
layout of this data structure is prone to change, this poses problems
for maintaining compatibility.
To address this problem, the compiler can produce this information as
module-level named metadata. For example (where P_NSP_LIMIT is the
offending offset):
!hipe.literals = !{ !2, !3, !4 }
!2 = !{ !"P_NSP_LIMIT", i32 152 }
!3 = !{ !"X86_LEAF_WORDS", i32 24 }
!4 = !{ !"AMD64_LEAF_WORDS", i32 24 }
Patch by Magnus Lang
Differential Revision: http://reviews.llvm.org/D20363
llvm-svn: 273593
82 lines
2.5 KiB
LLVM
82 lines
2.5 KiB
LLVM
; RUN: llc < %s -stack-symbol-ordering=0 -tailcallopt -code-model=medium -stack-alignment=4 -mtriple=i686-linux-gnu -mcpu=pentium | FileCheck %s
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; Check the HiPE calling convention works (x86-32)
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define void @zap(i32 %a, i32 %b) nounwind {
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entry:
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; CHECK: movl 40(%esp), %eax
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; CHECK-NEXT: movl 44(%esp), %edx
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; CHECK-NEXT: movl $8, %ecx
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; CHECK-NEXT: calll addfour
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%0 = call cc 11 {i32, i32, i32} @addfour(i32 undef, i32 undef, i32 %a, i32 %b, i32 8)
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%res = extractvalue {i32, i32, i32} %0, 2
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; CHECK: movl %eax, 16(%esp)
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; CHECK-NEXT: movl $2, 12(%esp)
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; CHECK-NEXT: movl $1, 8(%esp)
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; CHECK: calll foo
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tail call void @foo(i32 undef, i32 undef, i32 1, i32 2, i32 %res) nounwind
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ret void
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}
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define cc 11 {i32, i32, i32} @addfour(i32 %hp, i32 %p, i32 %x, i32 %y, i32 %z) nounwind {
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entry:
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; CHECK: addl %edx, %eax
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; CHECK-NEXT: addl %ecx, %eax
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%0 = add i32 %x, %y
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%1 = add i32 %0, %z
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; CHECK: ret
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%res = insertvalue {i32, i32, i32} undef, i32 %1, 2
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ret {i32, i32, i32} %res
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}
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define cc 11 void @foo(i32 %hp, i32 %p, i32 %arg0, i32 %arg1, i32 %arg2) nounwind {
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entry:
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; CHECK: movl %esi, 16(%esp)
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; CHECK-NEXT: movl %ebp, 12(%esp)
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; CHECK-NEXT: movl %eax, 8(%esp)
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; CHECK-NEXT: movl %edx, 4(%esp)
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; CHECK-NEXT: movl %ecx, (%esp)
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%hp_var = alloca i32
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%p_var = alloca i32
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%arg0_var = alloca i32
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%arg1_var = alloca i32
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%arg2_var = alloca i32
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store i32 %hp, i32* %hp_var
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store i32 %p, i32* %p_var
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store i32 %arg0, i32* %arg0_var
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store i32 %arg1, i32* %arg1_var
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store i32 %arg2, i32* %arg2_var
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; CHECK: movl 16(%esp), %esi
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; CHECK-NEXT: movl 12(%esp), %ebp
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; CHECK-NEXT: movl 8(%esp), %eax
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; CHECK-NEXT: movl 4(%esp), %edx
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%0 = load i32, i32* %hp_var
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%1 = load i32, i32* %p_var
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%2 = load i32, i32* %arg0_var
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%3 = load i32, i32* %arg1_var
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%4 = load i32, i32* %arg2_var
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; CHECK: jmp bar
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tail call cc 11 void @bar(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) nounwind
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ret void
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}
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define cc 11 void @baz() nounwind {
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%tmp_clos = load i32, i32* @clos
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%tmp_clos2 = inttoptr i32 %tmp_clos to i32*
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%indirect_call = bitcast i32* %tmp_clos2 to void (i32, i32, i32)*
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; CHECK: movl $42, %eax
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; CHECK-NEXT: jmpl *clos
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tail call cc 11 void %indirect_call(i32 undef, i32 undef, i32 42) nounwind
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ret void
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}
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!hipe.literals = !{ !0, !1, !2 }
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!0 = !{ !"P_NSP_LIMIT", i32 84 }
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!1 = !{ !"X86_LEAF_WORDS", i32 24 }
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!2 = !{ !"AMD64_LEAF_WORDS", i32 24 }
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@clos = external constant i32
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declare cc 11 void @bar(i32, i32, i32, i32, i32)
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