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Analysis.h
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Move several SelectionDAG-independent utility functions out of the
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2010-04-21 01:22:34 +00:00 |
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AsmPrinter.h
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Rework global alignment computation again. Now we do round up
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2010-04-28 19:58:07 +00:00 |
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BinaryObject.h
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CalcSpillWeights.h
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CallingConvLower.h
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FastISel.h
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Add initial kill flag support to FastISel.
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2010-05-11 23:54:07 +00:00 |
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GCMetadata.h
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Add const qualifiers to CodeGen's use of LLVM IR constructs.
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2010-04-15 01:51:59 +00:00 |
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GCMetadataPrinter.h
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GCs.h
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GCStrategy.h
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IntrinsicLowering.h
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ISDOpcodes.h
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Implement eh.sjlj.longjmp for ARM. Clean up the intrinsic a bit.
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2010-05-22 01:06:18 +00:00 |
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JITCodeEmitter.h
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Add a "PadTo" field to the emitULEB128Bytes method. This will pad out to the
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2010-04-18 00:51:49 +00:00 |
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LatencyPriorityQueue.h
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Delete an unused function.
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2010-05-26 00:56:27 +00:00 |
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LinkAllAsmWriterComponents.h
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LinkAllCodegenComponents.h
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Add a hybrid bottom up scheduler that reduce register usage while avoiding
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2010-05-20 06:13:19 +00:00 |
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LiveInterval.h
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Removed scaleNumbering method declaration from LiveInterval (not defined, not used).
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2010-05-21 03:04:04 +00:00 |
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LiveIntervalAnalysis.h
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Teach liveintervalanalysis about virtual registers which are defined by reg_sequence instructions that are formed by registers defined by distinct instructions. e.g.
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2010-05-05 18:27:40 +00:00 |
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LiveStackAnalysis.h
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LiveVariables.h
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MachineBasicBlock.h
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Eliminate MachineBasicBlock::const_livein_iterator and make
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2010-04-13 16:57:55 +00:00 |
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MachineCodeEmitter.h
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MachineCodeInfo.h
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MachineConstantPool.h
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Add const qualifiers to CodeGen's use of LLVM IR constructs.
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2010-04-15 01:51:59 +00:00 |
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MachineDominators.h
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Add an isReachableFromEntry to MachineDominators, following the one
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2010-04-05 19:16:38 +00:00 |
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MachineFrameInfo.h
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Implement @llvm.returnaddress. rdar://8015977.
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2010-05-22 01:47:14 +00:00 |
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MachineFunction.h
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Dale and Evan suggested putting the "check for setjmp" much earlier in the
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2010-05-26 00:32:40 +00:00 |
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MachineFunctionAnalysis.h
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Give MachineModuleInfo an actual Module*.
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2010-04-06 00:51:52 +00:00 |
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MachineFunctionPass.h
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MachineInstr.h
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- Change MachineInstr::findRegisterDefOperandIdx so it can also look for defs
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2010-05-21 20:53:24 +00:00 |
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MachineInstrBuilder.h
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Add const qualifiers to CodeGen's use of LLVM IR constructs.
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2010-04-15 01:51:59 +00:00 |
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MachineJumpTableInfo.h
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MachineLocation.h
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MachineLoopInfo.h
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MachineMemOperand.h
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MachineModuleInfo.h
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The JIT calls TidyLandingPads to tidy up the landing pads. However, because the
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2010-04-16 08:46:10 +00:00 |
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MachineModuleInfoImpls.h
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MachineOperand.h
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Add const qualifiers to CodeGen's use of LLVM IR constructs.
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2010-04-15 01:51:59 +00:00 |
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MachinePassRegistry.h
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MachineRegisterInfo.h
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Avoid adding duplicate function live-in's.
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2010-05-24 21:33:37 +00:00 |
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MachineRelocation.h
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MachineSSAUpdater.h
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Combine the implementations of the core part of the SSAUpdater and
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2010-05-04 23:18:19 +00:00 |
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MachORelocation.h
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ObjectCodeEmitter.h
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Passes.h
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Add fast register allocator, enabled with -regalloc=fast.
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2010-04-21 18:02:42 +00:00 |
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ProcessImplicitDefs.h
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PseudoSourceValue.h
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RegAllocRegistry.h
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RegisterCoalescer.h
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RegisterScavenging.h
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RuntimeLibcalls.h
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ScheduleDAG.h
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Delete an unused function.
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2010-05-26 00:56:27 +00:00 |
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ScheduleHazardRecognizer.h
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SchedulerRegistry.h
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Add a hybrid bottom up scheduler that reduce register usage while avoiding
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2010-05-20 06:13:19 +00:00 |
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SelectionDAG.h
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Implement a bunch more TargetSelectionDAGInfo infrastructure.
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2010-05-11 17:31:57 +00:00 |
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SelectionDAGISel.h
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Move HandlePHINodesInSuccessorBlocks functions out of SelectionDAGISel
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2010-04-22 20:46:50 +00:00 |
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SelectionDAGNodes.h
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Add const qualifiers to CodeGen's use of LLVM IR constructs.
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2010-04-15 01:51:59 +00:00 |
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SlotIndexes.h
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remove some unneeded errorhandling stuff.
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2010-04-07 22:44:07 +00:00 |
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TargetLoweringObjectFileImpl.h
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More data/parsing support for tls directives. Add a few more testcases
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2010-05-17 22:53:55 +00:00 |
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ValueTypes.h
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Fix enum to address array bounds regression.
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2010-05-18 21:22:12 +00:00 |
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ValueTypes.td
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Adding a v8i64 512-bit vector type. This will be used to model ARM NEON intrinsics which translate into a pair of vld / vst instructions that can load / store 8 consecutive 64-bit (D) registers.
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2010-05-13 23:55:47 +00:00 |
