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4f195c2484
This is recommit of r287553 after fixing the invalid loop info after eliminating an empty block and unit test failures in AVR and WebAssembly : Summary: Merging an empty case block into the header block of switch could cause ISel to add COPY instructions in the header of switch, instead of the case block, if the case block is used as an incoming block of a PHI. This could potentially increase dynamic instructions, especially when the switch is in a loop. I added a test case which was reduced from the benchmark I was targetting. Reviewers: t.p.northover, mcrosier, manmanren, wmi, joerg, davidxl Subscribers: joerg, qcolombet, danielcdh, hfinkel, mcrosier, llvm-commits Differential Revision: https://reviews.llvm.org/D22696 llvm-svn: 289988
59 lines
1.9 KiB
LLVM
59 lines
1.9 KiB
LLVM
; RUN: llc -march=avr -print-after=expand-isel-pseudos -cgp-freq-ratio-to-skip-merge=10 < %s 2>&1 | FileCheck %s
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; Because `switch` seems to trigger Machine Basic Blocks to be ordered
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; in a different order than they were constructed, this exposes an
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; error in the `expand-isel-pseudos` pass. Specifically, it thought we
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; could always fallthrough to a newly-constructed MBB. However,
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; there's no guarantee that either of the constructed MBBs need to
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; occur immediately after the currently-focused one!
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;
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; This issue manifests in a CFG that looks something like this:
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;
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; BB#2: derived from LLVM BB %finish
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; Predecessors according to CFG: BB#0 BB#1
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; %vreg0<def> = PHI %vreg3, <BB#0>, %vreg5, <BB#1>
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; %vreg7<def> = LDIRdK 2
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; %vreg8<def> = LDIRdK 1
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; CPRdRr %vreg2, %vreg0, %SREG<imp-def>
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; BREQk <BB#6>, %SREG<imp-use>
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; Successors according to CFG: BB#5(?%) BB#6(?%)
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;
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; The code assumes it the fallthrough block after this is BB#5, but
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; it's actually BB#3! To be proper, there should be an unconditional
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; jump tying this block to BB#5.
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define i8 @select_must_add_unconditional_jump(i8 %arg0, i8 %arg1) unnamed_addr {
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entry-block:
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switch i8 %arg0, label %dead [
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i8 0, label %zero
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i8 1, label %one
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]
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zero:
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br label %finish
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one:
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br label %finish
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finish:
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%predicate = phi i8 [ 50, %zero ], [ 100, %one ]
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%is_eq = icmp eq i8 %arg1, %predicate
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%result = select i1 %is_eq, i8 1, i8 2
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ret i8 %result
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dead:
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ret i8 0
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}
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; This check may be a bit brittle, but the important thing is that the
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; basic block containing `select` needs to contain explicit jumps to
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; both successors.
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; CHECK: BB#2: derived from LLVM BB %finish
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; CHECK: BREQk <[[BRANCHED:BB#[0-9]+]]>
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; CHECK: RJMPk <[[DIRECT:BB#[0-9]+]]>
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; CHECK: Successors according to CFG
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; CHECK-SAME-DAG: {{.*}}[[BRANCHED]]
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; CHECK-SAME-DAG: {{.*}}[[DIRECT]]
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; CHECK: BB#3: derived from LLVM BB
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