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c5dcb602f8
Move store merge to happen after intrinsic lowering to allow lowered stores to be merged. Some regressions due in MergeConsecutiveStores to missing insert_subvector that are addressed in follow up patch. Reviewers: craig.topper, efriedma, RKSimon Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D34559 llvm-svn: 310710
23 lines
769 B
LLVM
23 lines
769 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,-slow-unaligned-mem-32 | FileCheck %s --check-prefix=FAST
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+slow-unaligned-mem-32 | FileCheck %s --check-prefix=SLOW
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define i256 @foo(<8 x i32> %a) {
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; FAST-LABEL: foo:
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; FAST: # BB#0:
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; FAST-NEXT: vmovups %ymm0, (%rdi)
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; FAST-NEXT: movq %rdi, %rax
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; FAST-NEXT: vzeroupper
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; FAST-NEXT: retq
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;
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; SLOW-LABEL: foo:
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; SLOW: # BB#0:
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; SLOW-NEXT: vextractf128 $1, %ymm0, 16(%rdi)
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; SLOW-NEXT: vmovups %xmm0, (%rdi)
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; SLOW-NEXT: movq %rdi, %rax
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; SLOW-NEXT: vzeroupper
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; SLOW-NEXT: retq
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%r = bitcast <8 x i32> %a to i256
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ret i256 %r
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}
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