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8bd22a21c9
Rewrite fixupKills() to use the LivePhysRegs class. Simplifies the code and fixes a bug where the CSR registers in return blocks where missed leading to invalid kill flags. Also remove the unnecessary rule that we wouldn't set kill flags on tied operands. No tests as I have an upcoming commit improving MachineVerifier checks to catch these cases in multiple existing lit tests. llvm-svn: 304055
84 lines
3.2 KiB
YAML
84 lines
3.2 KiB
YAML
# RUN: llc -mtriple=i386-unknown-linux-gnu -mcpu=slm -run-pass post-RA-sched -o - %s | FileCheck %s
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#
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# Verify that the critical antidependence breaker does not consider
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# a high byte register as available as a replacement register
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# in a certain context.
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--- |
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define void @main() { ret void }
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...
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---
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# CHECK-LABEL: main
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name: main
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tracksRegLiveness: true
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frameInfo:
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stackSize: 52
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fixedStack:
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- { id: 0, type: spill-slot, offset: -20, size: 4, alignment: 4, callee-saved-register: '%esi' }
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- { id: 1, type: spill-slot, offset: -16, size: 4, alignment: 4, callee-saved-register: '%edi' }
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- { id: 2, type: spill-slot, offset: -12, size: 4, alignment: 4, callee-saved-register: '%ebx' }
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- { id: 3, type: spill-slot, offset: -8, size: 4, alignment: 4, callee-saved-register: '%ebp' }
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stack:
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- { id: 0, type: spill-slot, offset: -53, size: 1, alignment: 1 }
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- { id: 1, type: spill-slot, offset: -48, size: 4, alignment: 4 }
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- { id: 2, type: spill-slot, offset: -32, size: 4, alignment: 4 }
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body: |
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bb.0:
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liveins: %ebp, %ebx, %edi, %esi
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frame-setup PUSH32r killed %ebp, implicit-def %esp, implicit %esp
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frame-setup PUSH32r killed %ebx, implicit-def %esp, implicit %esp
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frame-setup PUSH32r killed %edi, implicit-def %esp, implicit %esp
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frame-setup PUSH32r killed %esi, implicit-def %esp, implicit %esp
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%esp = frame-setup SUB32ri8 %esp, 36, implicit-def dead %eflags
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%eax = MOV32ri 1
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%ebp = MOV32ri 2
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%ebx = MOV32ri 3
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%ecx = MOV32ri 4
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%edi = MOV32ri 5
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%edx = MOV32ri 6
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bb.1:
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liveins: %eax, %ebp, %ebx, %ecx, %edi, %edx
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%ebp = SHR32rCL killed %ebp, implicit-def dead %eflags, implicit %cl
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%ebp = XOR32rr killed %ebp, killed %ebx, implicit-def dead %eflags
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TEST32rr %edx, %edx, implicit-def %eflags
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%cl = SETNEr implicit %eflags
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; This %bl def is antidependent on the above use of %ebx
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%bl = MOV8rm %esp, 1, _, 3, _ ; :: (load 1 from %stack.0)
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%cl = OR8rr killed %cl, %bl, implicit-def dead %eflags
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%esi = MOVZX32rr8 killed %cl
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%esi = ADD32rr killed %esi, killed %edi, implicit-def dead %eflags
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%ecx = MOV32rm %esp, 1, _, 24, _ ; :: (load 4 from %stack.2)
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%edx = SAR32rCL killed %edx, implicit-def dead %eflags, implicit %cl
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TEST32rr killed %edx, %edx, implicit-def %eflags
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%cl = SETNEr implicit %eflags
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; Verify that removal of the %bl antidependence does not use %ch
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; as a replacement register.
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; CHECK: %cl = AND8rr killed %cl, killed %b
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%cl = AND8rr killed %cl, killed %bl, implicit-def dead %eflags
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CMP32ri8 %ebp, -1, implicit-def %eflags
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%edx = MOV32ri 0
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JE_1 %bb.3, implicit %eflags
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bb.2:
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liveins: %cl, %eax, %ebp, %esi
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OR32mr %esp, 1, _, 8, _, killed %eax, implicit-def %eflags ; :: (store 4 into %stack.1)
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%dl = SETNEr implicit %eflags, implicit-def %edx
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bb.3:
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liveins: %cl, %ebp, %edx, %esi
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%eax = XOR32rr undef %eax, undef %eax, implicit-def dead %eflags
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%esp = ADD32ri8 %esp, 36, implicit-def dead %eflags
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%esi = POP32r implicit-def %esp, implicit %esp
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%edi = POP32r implicit-def %esp, implicit %esp
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%ebx = POP32r implicit-def %esp, implicit %esp
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%ebp = POP32r implicit-def %esp, implicit %esp
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RET 0, %eax
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...
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