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ac11cfc716
This also adds new interfaces for the fixed- and scalable case: * LLT::fixed_vector * LLT::scalable_vector The strategy for migrating to the new interfaces was as follows: * If the new LLT is a (modified) clone of another LLT, taking the same number of elements, then use LLT::vector(OtherTy.getElementCount()) or if the number of elements is halfed/doubled, it uses .divideCoefficientBy(2) or operator*. That is because there is no reason to specifically restrict the types to 'fixed_vector'. * If the algorithm works on the number of elements (as unsigned), then just use fixed_vector. This will need to be fixed up in the future when modifying the algorithm to also work for scalable vectors, and will need then need additional tests to confirm the behaviour works the same for scalable vectors. * If the test used the '/*Scalable=*/true` flag of LLT::vector, then this is replaced by LLT::scalable_vector. Reviewed By: aemerson Differential Revision: https://reviews.llvm.org/D104451
564 lines
20 KiB
C++
564 lines
20 KiB
C++
//===- X86LegalizerInfo.cpp --------------------------------------*- C++ -*-==//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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/// \file
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/// This file implements the targeting of the Machinelegalizer class for X86.
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/// \todo This should be generated by TableGen.
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//===----------------------------------------------------------------------===//
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#include "X86LegalizerInfo.h"
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#include "X86Subtarget.h"
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#include "X86TargetMachine.h"
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#include "llvm/CodeGen/GlobalISel/LegalizerHelper.h"
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#include "llvm/CodeGen/TargetOpcodes.h"
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#include "llvm/CodeGen/ValueTypes.h"
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#include "llvm/IR/DerivedTypes.h"
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#include "llvm/IR/Type.h"
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using namespace llvm;
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using namespace TargetOpcode;
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using namespace LegalizeActions;
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/// FIXME: The following static functions are SizeChangeStrategy functions
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/// that are meant to temporarily mimic the behaviour of the old legalization
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/// based on doubling/halving non-legal types as closely as possible. This is
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/// not entirly possible as only legalizing the types that are exactly a power
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/// of 2 times the size of the legal types would require specifying all those
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/// sizes explicitly.
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/// In practice, not specifying those isn't a problem, and the below functions
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/// should disappear quickly as we add support for legalizing non-power-of-2
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/// sized types further.
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static void addAndInterleaveWithUnsupported(
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LegacyLegalizerInfo::SizeAndActionsVec &result,
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const LegacyLegalizerInfo::SizeAndActionsVec &v) {
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for (unsigned i = 0; i < v.size(); ++i) {
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result.push_back(v[i]);
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if (i + 1 < v[i].first && i + 1 < v.size() &&
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v[i + 1].first != v[i].first + 1)
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result.push_back({v[i].first + 1, LegacyLegalizeActions::Unsupported});
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}
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}
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static LegacyLegalizerInfo::SizeAndActionsVec
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widen_1(const LegacyLegalizerInfo::SizeAndActionsVec &v) {
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assert(v.size() >= 1);
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assert(v[0].first > 1);
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LegacyLegalizerInfo::SizeAndActionsVec result = {
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{1, LegacyLegalizeActions::WidenScalar},
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{2, LegacyLegalizeActions::Unsupported}};
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addAndInterleaveWithUnsupported(result, v);
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auto Largest = result.back().first;
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result.push_back({Largest + 1, LegacyLegalizeActions::Unsupported});
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return result;
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}
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X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
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const X86TargetMachine &TM)
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: Subtarget(STI), TM(TM) {
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setLegalizerInfo32bit();
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setLegalizerInfo64bit();
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setLegalizerInfoSSE1();
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setLegalizerInfoSSE2();
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setLegalizerInfoSSE41();
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setLegalizerInfoAVX();
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setLegalizerInfoAVX2();
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setLegalizerInfoAVX512();
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setLegalizerInfoAVX512DQ();
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setLegalizerInfoAVX512BW();
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getActionDefinitionsBuilder(G_INTRINSIC_ROUNDEVEN)
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.scalarize(0)
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.minScalar(0, LLT::scalar(32))
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.libcall();
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auto &LegacyInfo = getLegacyLegalizerInfo();
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LegacyInfo.setLegalizeScalarToDifferentSizeStrategy(G_PHI, 0, widen_1);
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for (unsigned BinOp : {G_SUB, G_MUL, G_AND, G_OR, G_XOR})
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LegacyInfo.setLegalizeScalarToDifferentSizeStrategy(BinOp, 0, widen_1);
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for (unsigned MemOp : {G_LOAD, G_STORE})
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LegacyInfo.setLegalizeScalarToDifferentSizeStrategy(
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MemOp, 0, LegacyLegalizerInfo::narrowToSmallerAndWidenToSmallest);
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LegacyInfo.setLegalizeScalarToDifferentSizeStrategy(
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G_PTR_ADD, 1,
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LegacyLegalizerInfo::widenToLargerTypesUnsupportedOtherwise);
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LegacyInfo.setLegalizeScalarToDifferentSizeStrategy(
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G_CONSTANT, 0,
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LegacyLegalizerInfo::widenToLargerTypesAndNarrowToLargest);
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getActionDefinitionsBuilder({G_MEMCPY, G_MEMMOVE, G_MEMSET}).libcall();
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LegacyInfo.computeTables();
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verify(*STI.getInstrInfo());
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}
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bool X86LegalizerInfo::legalizeIntrinsic(LegalizerHelper &Helper,
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MachineInstr &MI) const {
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return true;
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}
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void X86LegalizerInfo::setLegalizerInfo32bit() {
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const LLT p0 = LLT::pointer(0, TM.getPointerSizeInBits(0));
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const LLT s1 = LLT::scalar(1);
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const LLT s8 = LLT::scalar(8);
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const LLT s16 = LLT::scalar(16);
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const LLT s32 = LLT::scalar(32);
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const LLT s64 = LLT::scalar(64);
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const LLT s128 = LLT::scalar(128);
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auto &LegacyInfo = getLegacyLegalizerInfo();
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for (auto Ty : {p0, s1, s8, s16, s32})
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LegacyInfo.setAction({G_IMPLICIT_DEF, Ty}, LegacyLegalizeActions::Legal);
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for (auto Ty : {s8, s16, s32, p0})
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LegacyInfo.setAction({G_PHI, Ty}, LegacyLegalizeActions::Legal);
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for (unsigned BinOp : {G_ADD, G_SUB, G_MUL, G_AND, G_OR, G_XOR})
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for (auto Ty : {s8, s16, s32})
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LegacyInfo.setAction({BinOp, Ty}, LegacyLegalizeActions::Legal);
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for (unsigned Op : {G_UADDE}) {
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LegacyInfo.setAction({Op, s32}, LegacyLegalizeActions::Legal);
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LegacyInfo.setAction({Op, 1, s1}, LegacyLegalizeActions::Legal);
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}
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for (unsigned MemOp : {G_LOAD, G_STORE}) {
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for (auto Ty : {s8, s16, s32, p0})
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LegacyInfo.setAction({MemOp, Ty}, LegacyLegalizeActions::Legal);
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// And everything's fine in addrspace 0.
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LegacyInfo.setAction({MemOp, 1, p0}, LegacyLegalizeActions::Legal);
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}
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// Pointer-handling
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LegacyInfo.setAction({G_FRAME_INDEX, p0}, LegacyLegalizeActions::Legal);
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LegacyInfo.setAction({G_GLOBAL_VALUE, p0}, LegacyLegalizeActions::Legal);
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LegacyInfo.setAction({G_PTR_ADD, p0}, LegacyLegalizeActions::Legal);
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LegacyInfo.setAction({G_PTR_ADD, 1, s32}, LegacyLegalizeActions::Legal);
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if (!Subtarget.is64Bit()) {
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getActionDefinitionsBuilder(G_PTRTOINT)
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.legalForCartesianProduct({s1, s8, s16, s32}, {p0})
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.maxScalar(0, s32)
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.widenScalarToNextPow2(0, /*Min*/ 8);
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getActionDefinitionsBuilder(G_INTTOPTR).legalFor({{p0, s32}});
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// Shifts and SDIV
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getActionDefinitionsBuilder(
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{G_SDIV, G_SREM, G_UDIV, G_UREM})
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.legalFor({s8, s16, s32})
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.clampScalar(0, s8, s32);
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getActionDefinitionsBuilder(
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{G_SHL, G_LSHR, G_ASHR})
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.legalFor({{s8, s8}, {s16, s8}, {s32, s8}})
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.clampScalar(0, s8, s32)
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.clampScalar(1, s8, s8);
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// Comparison
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getActionDefinitionsBuilder(G_ICMP)
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.legalForCartesianProduct({s8}, {s8, s16, s32, p0})
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.clampScalar(0, s8, s8);
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}
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// Control-flow
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LegacyInfo.setAction({G_BRCOND, s1}, LegacyLegalizeActions::Legal);
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// Constants
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for (auto Ty : {s8, s16, s32, p0})
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LegacyInfo.setAction({TargetOpcode::G_CONSTANT, Ty},
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LegacyLegalizeActions::Legal);
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// Extensions
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for (auto Ty : {s8, s16, s32}) {
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LegacyInfo.setAction({G_ZEXT, Ty}, LegacyLegalizeActions::Legal);
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LegacyInfo.setAction({G_SEXT, Ty}, LegacyLegalizeActions::Legal);
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LegacyInfo.setAction({G_ANYEXT, Ty}, LegacyLegalizeActions::Legal);
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}
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LegacyInfo.setAction({G_ANYEXT, s128}, LegacyLegalizeActions::Legal);
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getActionDefinitionsBuilder(G_SEXT_INREG).lower();
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// Merge/Unmerge
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for (const auto &Ty : {s16, s32, s64}) {
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LegacyInfo.setAction({G_MERGE_VALUES, Ty}, LegacyLegalizeActions::Legal);
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LegacyInfo.setAction({G_UNMERGE_VALUES, 1, Ty},
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LegacyLegalizeActions::Legal);
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}
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for (const auto &Ty : {s8, s16, s32}) {
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LegacyInfo.setAction({G_MERGE_VALUES, 1, Ty}, LegacyLegalizeActions::Legal);
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LegacyInfo.setAction({G_UNMERGE_VALUES, Ty}, LegacyLegalizeActions::Legal);
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}
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}
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void X86LegalizerInfo::setLegalizerInfo64bit() {
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if (!Subtarget.is64Bit())
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return;
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const LLT p0 = LLT::pointer(0, TM.getPointerSizeInBits(0));
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const LLT s1 = LLT::scalar(1);
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const LLT s8 = LLT::scalar(8);
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const LLT s16 = LLT::scalar(16);
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const LLT s32 = LLT::scalar(32);
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const LLT s64 = LLT::scalar(64);
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const LLT s128 = LLT::scalar(128);
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auto &LegacyInfo = getLegacyLegalizerInfo();
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LegacyInfo.setAction({G_IMPLICIT_DEF, s64}, LegacyLegalizeActions::Legal);
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// Need to have that, as tryFoldImplicitDef will create this pattern:
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// s128 = EXTEND (G_IMPLICIT_DEF s32/s64) -> s128 = G_IMPLICIT_DEF
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LegacyInfo.setAction({G_IMPLICIT_DEF, s128}, LegacyLegalizeActions::Legal);
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LegacyInfo.setAction({G_PHI, s64}, LegacyLegalizeActions::Legal);
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for (unsigned BinOp : {G_ADD, G_SUB, G_MUL, G_AND, G_OR, G_XOR})
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LegacyInfo.setAction({BinOp, s64}, LegacyLegalizeActions::Legal);
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for (unsigned MemOp : {G_LOAD, G_STORE})
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LegacyInfo.setAction({MemOp, s64}, LegacyLegalizeActions::Legal);
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// Pointer-handling
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LegacyInfo.setAction({G_PTR_ADD, 1, s64}, LegacyLegalizeActions::Legal);
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getActionDefinitionsBuilder(G_PTRTOINT)
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.legalForCartesianProduct({s1, s8, s16, s32, s64}, {p0})
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.maxScalar(0, s64)
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.widenScalarToNextPow2(0, /*Min*/ 8);
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getActionDefinitionsBuilder(G_INTTOPTR).legalFor({{p0, s64}});
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// Constants
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LegacyInfo.setAction({TargetOpcode::G_CONSTANT, s64},
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LegacyLegalizeActions::Legal);
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// Extensions
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for (unsigned extOp : {G_ZEXT, G_SEXT, G_ANYEXT}) {
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LegacyInfo.setAction({extOp, s64}, LegacyLegalizeActions::Legal);
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}
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getActionDefinitionsBuilder(G_SITOFP)
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.legalForCartesianProduct({s32, s64})
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.clampScalar(1, s32, s64)
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.widenScalarToNextPow2(1)
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.clampScalar(0, s32, s64)
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.widenScalarToNextPow2(0);
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getActionDefinitionsBuilder(G_FPTOSI)
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.legalForCartesianProduct({s32, s64})
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.clampScalar(1, s32, s64)
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.widenScalarToNextPow2(0)
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.clampScalar(0, s32, s64)
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.widenScalarToNextPow2(1);
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// Comparison
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getActionDefinitionsBuilder(G_ICMP)
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.legalForCartesianProduct({s8}, {s8, s16, s32, s64, p0})
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.clampScalar(0, s8, s8);
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getActionDefinitionsBuilder(G_FCMP)
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.legalForCartesianProduct({s8}, {s32, s64})
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.clampScalar(0, s8, s8)
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.clampScalar(1, s32, s64)
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.widenScalarToNextPow2(1);
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// Divisions
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getActionDefinitionsBuilder(
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{G_SDIV, G_SREM, G_UDIV, G_UREM})
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.legalFor({s8, s16, s32, s64})
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.clampScalar(0, s8, s64);
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// Shifts
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getActionDefinitionsBuilder(
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{G_SHL, G_LSHR, G_ASHR})
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.legalFor({{s8, s8}, {s16, s8}, {s32, s8}, {s64, s8}})
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.clampScalar(0, s8, s64)
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.clampScalar(1, s8, s8);
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// Merge/Unmerge
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LegacyInfo.setAction({G_MERGE_VALUES, s128}, LegacyLegalizeActions::Legal);
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LegacyInfo.setAction({G_UNMERGE_VALUES, 1, s128},
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LegacyLegalizeActions::Legal);
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LegacyInfo.setAction({G_MERGE_VALUES, 1, s128}, LegacyLegalizeActions::Legal);
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LegacyInfo.setAction({G_UNMERGE_VALUES, s128}, LegacyLegalizeActions::Legal);
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}
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void X86LegalizerInfo::setLegalizerInfoSSE1() {
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if (!Subtarget.hasSSE1())
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return;
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const LLT s32 = LLT::scalar(32);
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const LLT s64 = LLT::scalar(64);
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const LLT v4s32 = LLT::fixed_vector(4, 32);
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const LLT v2s64 = LLT::fixed_vector(2, 64);
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auto &LegacyInfo = getLegacyLegalizerInfo();
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for (unsigned BinOp : {G_FADD, G_FSUB, G_FMUL, G_FDIV})
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for (auto Ty : {s32, v4s32})
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LegacyInfo.setAction({BinOp, Ty}, LegacyLegalizeActions::Legal);
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for (unsigned MemOp : {G_LOAD, G_STORE})
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for (auto Ty : {v4s32, v2s64})
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LegacyInfo.setAction({MemOp, Ty}, LegacyLegalizeActions::Legal);
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// Constants
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LegacyInfo.setAction({TargetOpcode::G_FCONSTANT, s32},
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LegacyLegalizeActions::Legal);
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// Merge/Unmerge
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for (const auto &Ty : {v4s32, v2s64}) {
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LegacyInfo.setAction({G_CONCAT_VECTORS, Ty}, LegacyLegalizeActions::Legal);
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LegacyInfo.setAction({G_UNMERGE_VALUES, 1, Ty},
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LegacyLegalizeActions::Legal);
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}
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LegacyInfo.setAction({G_MERGE_VALUES, 1, s64}, LegacyLegalizeActions::Legal);
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LegacyInfo.setAction({G_UNMERGE_VALUES, s64}, LegacyLegalizeActions::Legal);
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}
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void X86LegalizerInfo::setLegalizerInfoSSE2() {
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if (!Subtarget.hasSSE2())
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return;
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const LLT s32 = LLT::scalar(32);
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const LLT s64 = LLT::scalar(64);
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const LLT v16s8 = LLT::fixed_vector(16, 8);
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const LLT v8s16 = LLT::fixed_vector(8, 16);
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const LLT v4s32 = LLT::fixed_vector(4, 32);
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const LLT v2s64 = LLT::fixed_vector(2, 64);
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const LLT v32s8 = LLT::fixed_vector(32, 8);
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const LLT v16s16 = LLT::fixed_vector(16, 16);
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const LLT v8s32 = LLT::fixed_vector(8, 32);
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const LLT v4s64 = LLT::fixed_vector(4, 64);
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auto &LegacyInfo = getLegacyLegalizerInfo();
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for (unsigned BinOp : {G_FADD, G_FSUB, G_FMUL, G_FDIV})
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for (auto Ty : {s64, v2s64})
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LegacyInfo.setAction({BinOp, Ty}, LegacyLegalizeActions::Legal);
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for (unsigned BinOp : {G_ADD, G_SUB})
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for (auto Ty : {v16s8, v8s16, v4s32, v2s64})
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LegacyInfo.setAction({BinOp, Ty}, LegacyLegalizeActions::Legal);
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LegacyInfo.setAction({G_MUL, v8s16}, LegacyLegalizeActions::Legal);
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LegacyInfo.setAction({G_FPEXT, s64}, LegacyLegalizeActions::Legal);
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LegacyInfo.setAction({G_FPEXT, 1, s32}, LegacyLegalizeActions::Legal);
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LegacyInfo.setAction({G_FPTRUNC, s32}, LegacyLegalizeActions::Legal);
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LegacyInfo.setAction({G_FPTRUNC, 1, s64}, LegacyLegalizeActions::Legal);
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// Constants
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LegacyInfo.setAction({TargetOpcode::G_FCONSTANT, s64},
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LegacyLegalizeActions::Legal);
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// Merge/Unmerge
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for (const auto &Ty :
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{v16s8, v32s8, v8s16, v16s16, v4s32, v8s32, v2s64, v4s64}) {
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LegacyInfo.setAction({G_CONCAT_VECTORS, Ty}, LegacyLegalizeActions::Legal);
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LegacyInfo.setAction({G_UNMERGE_VALUES, 1, Ty},
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LegacyLegalizeActions::Legal);
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}
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for (const auto &Ty : {v16s8, v8s16, v4s32, v2s64}) {
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LegacyInfo.setAction({G_CONCAT_VECTORS, 1, Ty},
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LegacyLegalizeActions::Legal);
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LegacyInfo.setAction({G_UNMERGE_VALUES, Ty}, LegacyLegalizeActions::Legal);
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}
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}
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void X86LegalizerInfo::setLegalizerInfoSSE41() {
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if (!Subtarget.hasSSE41())
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return;
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const LLT v4s32 = LLT::fixed_vector(4, 32);
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auto &LegacyInfo = getLegacyLegalizerInfo();
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LegacyInfo.setAction({G_MUL, v4s32}, LegacyLegalizeActions::Legal);
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}
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void X86LegalizerInfo::setLegalizerInfoAVX() {
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if (!Subtarget.hasAVX())
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return;
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const LLT v16s8 = LLT::fixed_vector(16, 8);
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const LLT v8s16 = LLT::fixed_vector(8, 16);
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const LLT v4s32 = LLT::fixed_vector(4, 32);
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const LLT v2s64 = LLT::fixed_vector(2, 64);
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const LLT v32s8 = LLT::fixed_vector(32, 8);
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const LLT v64s8 = LLT::fixed_vector(64, 8);
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const LLT v16s16 = LLT::fixed_vector(16, 16);
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const LLT v32s16 = LLT::fixed_vector(32, 16);
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const LLT v8s32 = LLT::fixed_vector(8, 32);
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const LLT v16s32 = LLT::fixed_vector(16, 32);
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const LLT v4s64 = LLT::fixed_vector(4, 64);
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const LLT v8s64 = LLT::fixed_vector(8, 64);
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auto &LegacyInfo = getLegacyLegalizerInfo();
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for (unsigned MemOp : {G_LOAD, G_STORE})
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for (auto Ty : {v8s32, v4s64})
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LegacyInfo.setAction({MemOp, Ty}, LegacyLegalizeActions::Legal);
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for (auto Ty : {v32s8, v16s16, v8s32, v4s64}) {
|
|
LegacyInfo.setAction({G_INSERT, Ty}, LegacyLegalizeActions::Legal);
|
|
LegacyInfo.setAction({G_EXTRACT, 1, Ty}, LegacyLegalizeActions::Legal);
|
|
}
|
|
for (auto Ty : {v16s8, v8s16, v4s32, v2s64}) {
|
|
LegacyInfo.setAction({G_INSERT, 1, Ty}, LegacyLegalizeActions::Legal);
|
|
LegacyInfo.setAction({G_EXTRACT, Ty}, LegacyLegalizeActions::Legal);
|
|
}
|
|
// Merge/Unmerge
|
|
for (const auto &Ty :
|
|
{v32s8, v64s8, v16s16, v32s16, v8s32, v16s32, v4s64, v8s64}) {
|
|
LegacyInfo.setAction({G_CONCAT_VECTORS, Ty}, LegacyLegalizeActions::Legal);
|
|
LegacyInfo.setAction({G_UNMERGE_VALUES, 1, Ty},
|
|
LegacyLegalizeActions::Legal);
|
|
}
|
|
for (const auto &Ty :
|
|
{v16s8, v32s8, v8s16, v16s16, v4s32, v8s32, v2s64, v4s64}) {
|
|
LegacyInfo.setAction({G_CONCAT_VECTORS, 1, Ty},
|
|
LegacyLegalizeActions::Legal);
|
|
LegacyInfo.setAction({G_UNMERGE_VALUES, Ty}, LegacyLegalizeActions::Legal);
|
|
}
|
|
}
|
|
|
|
void X86LegalizerInfo::setLegalizerInfoAVX2() {
|
|
if (!Subtarget.hasAVX2())
|
|
return;
|
|
|
|
const LLT v32s8 = LLT::fixed_vector(32, 8);
|
|
const LLT v16s16 = LLT::fixed_vector(16, 16);
|
|
const LLT v8s32 = LLT::fixed_vector(8, 32);
|
|
const LLT v4s64 = LLT::fixed_vector(4, 64);
|
|
|
|
const LLT v64s8 = LLT::fixed_vector(64, 8);
|
|
const LLT v32s16 = LLT::fixed_vector(32, 16);
|
|
const LLT v16s32 = LLT::fixed_vector(16, 32);
|
|
const LLT v8s64 = LLT::fixed_vector(8, 64);
|
|
|
|
auto &LegacyInfo = getLegacyLegalizerInfo();
|
|
|
|
for (unsigned BinOp : {G_ADD, G_SUB})
|
|
for (auto Ty : {v32s8, v16s16, v8s32, v4s64})
|
|
LegacyInfo.setAction({BinOp, Ty}, LegacyLegalizeActions::Legal);
|
|
|
|
for (auto Ty : {v16s16, v8s32})
|
|
LegacyInfo.setAction({G_MUL, Ty}, LegacyLegalizeActions::Legal);
|
|
|
|
// Merge/Unmerge
|
|
for (const auto &Ty : {v64s8, v32s16, v16s32, v8s64}) {
|
|
LegacyInfo.setAction({G_CONCAT_VECTORS, Ty}, LegacyLegalizeActions::Legal);
|
|
LegacyInfo.setAction({G_UNMERGE_VALUES, 1, Ty},
|
|
LegacyLegalizeActions::Legal);
|
|
}
|
|
for (const auto &Ty : {v32s8, v16s16, v8s32, v4s64}) {
|
|
LegacyInfo.setAction({G_CONCAT_VECTORS, 1, Ty},
|
|
LegacyLegalizeActions::Legal);
|
|
LegacyInfo.setAction({G_UNMERGE_VALUES, Ty}, LegacyLegalizeActions::Legal);
|
|
}
|
|
}
|
|
|
|
void X86LegalizerInfo::setLegalizerInfoAVX512() {
|
|
if (!Subtarget.hasAVX512())
|
|
return;
|
|
|
|
const LLT v16s8 = LLT::fixed_vector(16, 8);
|
|
const LLT v8s16 = LLT::fixed_vector(8, 16);
|
|
const LLT v4s32 = LLT::fixed_vector(4, 32);
|
|
const LLT v2s64 = LLT::fixed_vector(2, 64);
|
|
|
|
const LLT v32s8 = LLT::fixed_vector(32, 8);
|
|
const LLT v16s16 = LLT::fixed_vector(16, 16);
|
|
const LLT v8s32 = LLT::fixed_vector(8, 32);
|
|
const LLT v4s64 = LLT::fixed_vector(4, 64);
|
|
|
|
const LLT v64s8 = LLT::fixed_vector(64, 8);
|
|
const LLT v32s16 = LLT::fixed_vector(32, 16);
|
|
const LLT v16s32 = LLT::fixed_vector(16, 32);
|
|
const LLT v8s64 = LLT::fixed_vector(8, 64);
|
|
|
|
auto &LegacyInfo = getLegacyLegalizerInfo();
|
|
|
|
for (unsigned BinOp : {G_ADD, G_SUB})
|
|
for (auto Ty : {v16s32, v8s64})
|
|
LegacyInfo.setAction({BinOp, Ty}, LegacyLegalizeActions::Legal);
|
|
|
|
LegacyInfo.setAction({G_MUL, v16s32}, LegacyLegalizeActions::Legal);
|
|
|
|
for (unsigned MemOp : {G_LOAD, G_STORE})
|
|
for (auto Ty : {v16s32, v8s64})
|
|
LegacyInfo.setAction({MemOp, Ty}, LegacyLegalizeActions::Legal);
|
|
|
|
for (auto Ty : {v64s8, v32s16, v16s32, v8s64}) {
|
|
LegacyInfo.setAction({G_INSERT, Ty}, LegacyLegalizeActions::Legal);
|
|
LegacyInfo.setAction({G_EXTRACT, 1, Ty}, LegacyLegalizeActions::Legal);
|
|
}
|
|
for (auto Ty : {v32s8, v16s16, v8s32, v4s64, v16s8, v8s16, v4s32, v2s64}) {
|
|
LegacyInfo.setAction({G_INSERT, 1, Ty}, LegacyLegalizeActions::Legal);
|
|
LegacyInfo.setAction({G_EXTRACT, Ty}, LegacyLegalizeActions::Legal);
|
|
}
|
|
|
|
/************ VLX *******************/
|
|
if (!Subtarget.hasVLX())
|
|
return;
|
|
|
|
for (auto Ty : {v4s32, v8s32})
|
|
LegacyInfo.setAction({G_MUL, Ty}, LegacyLegalizeActions::Legal);
|
|
}
|
|
|
|
void X86LegalizerInfo::setLegalizerInfoAVX512DQ() {
|
|
if (!(Subtarget.hasAVX512() && Subtarget.hasDQI()))
|
|
return;
|
|
|
|
const LLT v8s64 = LLT::fixed_vector(8, 64);
|
|
|
|
auto &LegacyInfo = getLegacyLegalizerInfo();
|
|
|
|
LegacyInfo.setAction({G_MUL, v8s64}, LegacyLegalizeActions::Legal);
|
|
|
|
/************ VLX *******************/
|
|
if (!Subtarget.hasVLX())
|
|
return;
|
|
|
|
const LLT v2s64 = LLT::fixed_vector(2, 64);
|
|
const LLT v4s64 = LLT::fixed_vector(4, 64);
|
|
|
|
for (auto Ty : {v2s64, v4s64})
|
|
LegacyInfo.setAction({G_MUL, Ty}, LegacyLegalizeActions::Legal);
|
|
}
|
|
|
|
void X86LegalizerInfo::setLegalizerInfoAVX512BW() {
|
|
if (!(Subtarget.hasAVX512() && Subtarget.hasBWI()))
|
|
return;
|
|
|
|
const LLT v64s8 = LLT::fixed_vector(64, 8);
|
|
const LLT v32s16 = LLT::fixed_vector(32, 16);
|
|
|
|
auto &LegacyInfo = getLegacyLegalizerInfo();
|
|
|
|
for (unsigned BinOp : {G_ADD, G_SUB})
|
|
for (auto Ty : {v64s8, v32s16})
|
|
LegacyInfo.setAction({BinOp, Ty}, LegacyLegalizeActions::Legal);
|
|
|
|
LegacyInfo.setAction({G_MUL, v32s16}, LegacyLegalizeActions::Legal);
|
|
|
|
/************ VLX *******************/
|
|
if (!Subtarget.hasVLX())
|
|
return;
|
|
|
|
const LLT v8s16 = LLT::fixed_vector(8, 16);
|
|
const LLT v16s16 = LLT::fixed_vector(16, 16);
|
|
|
|
for (auto Ty : {v8s16, v16s16})
|
|
LegacyInfo.setAction({G_MUL, Ty}, LegacyLegalizeActions::Legal);
|
|
}
|