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1ae69080bd
The instruction sequence used to get the address of the PC into a GPR requires that we clobber the link register. Doing so without having first saved it in the prologue leaves the function unable to return. Currently, this sequence is emitted into the entry block. To ensure the prologue is inserted before this sequence, disable shrink-wrapping. This fixes PR33547. Differential Revision: https://reviews.llvm.org/D43677 llvm-svn: 325972
71 lines
2.8 KiB
LLVM
71 lines
2.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown \
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; RUN: -mcpu=pwr8 -code-model=large < %s | FileCheck %s
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%struct.STATICS1 = type <{ [128 x i8] }>
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@.STATICS1 = internal global %struct.STATICS1 <{ [128 x i8] c"\09\00\00\00\03\00\00\00\05\00\00\00\04\00\00\00\0A\00\00\00\0A\00\00\00\0B\00\00\00\0A\08\AF/\B8\B6\87\04 \A1\07\00\08\9D\00\00\09\00\00\00\05\00\00\00\03\00\00\00\03\00\00\00\05\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00" }>, align 16
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@.C302_MAIN_ = internal constant i32 4
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; Function Attrs: noinline norecurse nounwind
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define void @main() {
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L.entry:
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tail call void @testFunc(i64* bitcast (i8* getelementptr inbounds (%struct.STATICS1, %struct.STATICS1* @.STATICS1, i64 0, i32 0, i64 124) to i64*), i64* bitcast (i32* @.C302_MAIN_ to i64*))
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ret void
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}
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; Function Attrs: noinline norecurse nounwind readonly
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define signext i32 @ifunc_(i64* nocapture readonly %i) {
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; CHECK-LABEL: ifunc_:
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; CHECK: # %bb.0: # %L.entry
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; CHECK-NEXT: lwa 3, 0(3)
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; CHECK-NEXT: blr
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L.entry:
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%0 = bitcast i64* %i to i32*
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%1 = load i32, i32* %0, align 4
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ret i32 %1
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}
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; Function Attrs: noinline norecurse nounwind
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define void @testFunc(i64* nocapture %r, i64* nocapture readonly %k) {
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; CHECK-LABEL: testFunc
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; CHECK: mflr 0
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; CHECK: std 0, 16(1)
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; CHECK: bl .[[BRANCHNEXT:[L0-9\$a-z]+]]
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; CHECK-NEXT: [[BRANCHNEXT]]
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L.entry:
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%0 = bitcast i64* %k to i32*
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%1 = load i32, i32* %0, align 4
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switch i32 %1, label %L.LB3_307 [
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i32 1, label %L.LB3_307.sink.split
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i32 3, label %L.LB3_307.sink.split
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i32 4, label %L.LB3_321.split
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i32 5, label %L.LB3_307.sink.split
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i32 6, label %infloop.preheader
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i32 2, label %infloop11.preheader
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]
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infloop11.preheader: ; preds = %L.entry
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br label %infloop11
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infloop.preheader: ; preds = %L.entry
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br label %infloop
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L.LB3_321.split: ; preds = %L.entry
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br label %L.LB3_307.sink.split
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L.LB3_307.sink.split: ; preds = %L.LB3_321.split, %L.entry, %L.entry, %L.entry
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%.sink = phi i32 [ 5, %L.LB3_321.split ], [ -3, %L.entry ], [ -3, %L.entry ], [ -3, %L.entry ]
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%2 = bitcast i64* %r to i32*
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store i32 %.sink, i32* %2, align 4
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br label %L.LB3_307
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L.LB3_307: ; preds = %L.LB3_307.sink.split, %L.entry
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ret void
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infloop: ; preds = %infloop.preheader, %infloop
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br label %infloop
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infloop11: ; preds = %infloop11.preheader, %infloop11
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br label %infloop11
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}
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