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To support OpenCL, which typically uses SPIR as an IR, non-zero address spaces must be accounted for. This patch makes the RISC-V target assume no-op address space casts across the board, which effectively removes the need to support addrspacecast instructions in the backend. For a RISC-V implementation with different configurations or specialized address spaces where casts aren't no-ops, the function can be adjusted as required. Reviewed By: jrtc27 Differential Revision: https://reviews.llvm.org/D93536 |
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configure | ||
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LICENSE.TXT | ||
llvm.spec.in | ||
README.txt | ||
RELEASE_TESTERS.TXT |
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