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https://github.com/RPCS3/llvm-mirror.git
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129 lines
3.4 KiB
LLVM
129 lines
3.4 KiB
LLVM
; Test 16-bit signed ordered comparisons between memory and a constant.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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; Check comparisons with 0.
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define double @f1(double %a, double %b, i16 *%ptr) {
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; CHECK-LABEL: f1:
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; CHECK: chhsi 0(%r2), 0
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; CHECK-NEXT: blr %r14
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%val = load i16, i16 *%ptr
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%cond = icmp slt i16 %val, 0
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check comparisons with 1.
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define double @f2(double %a, double %b, i16 *%ptr) {
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; CHECK-LABEL: f2:
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; CHECK: chhsi 0(%r2), 0
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; CHECK-NEXT: bler %r14
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%val = load i16, i16 *%ptr
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%cond = icmp slt i16 %val, 1
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check a value near the high end of the signed 16-bit range.
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define double @f3(double %a, double %b, i16 *%ptr) {
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; CHECK-LABEL: f3:
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; CHECK: chhsi 0(%r2), 32766
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; CHECK-NEXT: blr %r14
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%val = load i16, i16 *%ptr
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%cond = icmp slt i16 %val, 32766
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check comparisons with -1.
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define double @f4(double %a, double %b, i16 *%ptr) {
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; CHECK-LABEL: f4:
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; CHECK: chhsi 0(%r2), -1
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; CHECK-NEXT: blr %r14
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%val = load i16, i16 *%ptr
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%cond = icmp slt i16 %val, -1
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check a value near the low end of the 16-bit signed range.
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define double @f5(double %a, double %b, i16 *%ptr) {
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; CHECK-LABEL: f5:
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; CHECK: chhsi 0(%r2), -32766
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; CHECK-NEXT: blr %r14
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%val = load i16, i16 *%ptr
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%cond = icmp slt i16 %val, -32766
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check the high end of the CHHSI range.
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define double @f6(double %a, double %b, i16 %i1, i16 *%base) {
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; CHECK-LABEL: f6:
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; CHECK: chhsi 4094(%r3), 0
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; CHECK-NEXT: blr %r14
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%ptr = getelementptr i16, i16 *%base, i64 2047
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%val = load i16, i16 *%ptr
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%cond = icmp slt i16 %val, 0
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check the next halfword up, which needs separate address logic,
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define double @f7(double %a, double %b, i16 *%base) {
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; CHECK-LABEL: f7:
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; CHECK: aghi %r2, 4096
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; CHECK: chhsi 0(%r2), 0
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; CHECK-NEXT: blr %r14
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%ptr = getelementptr i16, i16 *%base, i64 2048
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%val = load i16, i16 *%ptr
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%cond = icmp slt i16 %val, 0
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check negative offsets, which also need separate address logic.
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define double @f8(double %a, double %b, i16 *%base) {
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; CHECK-LABEL: f8:
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; CHECK: aghi %r2, -2
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; CHECK: chhsi 0(%r2), 0
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; CHECK-NEXT: blr %r14
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%ptr = getelementptr i16, i16 *%base, i64 -1
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%val = load i16, i16 *%ptr
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%cond = icmp slt i16 %val, 0
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check that CHHSI does not allow indices.
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define double @f9(double %a, double %b, i64 %base, i64 %index) {
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; CHECK-LABEL: f9:
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; CHECK: agr {{%r2, %r3|%r3, %r2}}
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; CHECK: chhsi 0({{%r[23]}}), 0
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; CHECK-NEXT: blr %r14
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%add = add i64 %base, %index
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%ptr = inttoptr i64 %add to i16 *
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%val = load i16, i16 *%ptr
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%cond = icmp slt i16 %val, 0
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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